Panmnesia to Accelerate CXL Server Adoption in AI Data Centers with Ecosystem Partner
Continuing to promote its CXL strategy with visible partnership
This is a Press Release edited by StorageNewsletter.com on November 13, 2026 at 2:00 pmSummary:
- Memory locked inside each server… Intel Xeon enables CXL memory expansion, and Panmnesia’s switch extends the connection beyond the rack
- Signed MOU at Intel AI Summit 2026, the agreement covers a phased collaboration, from validating interoperability between Intel Xeon platforms and Panmnesia’s CXL Fusion Switch to rack-scale AI infrastructure
Panmnesia, a developer of link solutions for AI infrastructure, has signed a memorandum of understanding (MOU) with Intel Korea to collaborate on CXL technology.
The MOU was signed on November 12 at Intel AI Summit Seoul 2026, held at COEX in Seoul. The agreement aims to bring CXL-based servers into real-world AI data centers, and the two companies are pursuing this in phases, from interoperability validation to collaboration on rack-scale AI infrastructure.
As AI models and datasets grow, the memory they require is exceeding what a single server can hold. The problem is that memory is tied to individual servers: one server may have memory to spare while another runs short, yet there is no easy way to share it between them. This is the primary challenge the two companies aim to address. To that end, the collaboration centers on a CXL fabric-based memory expansion architecture that pairs Intel Xeon platforms with Panmnesia’s link semiconductors, such as its CXL switch, along with device interoperability validation and performance optimization for AI workloads. Looking further ahead, the companies will explore opportunities to further extend collaboration to rack-scale AI infrastructure, including building reference architectures and conducting proof-of-concept (PoC) demonstrations.
Panmnesia’s PCIe 6.4-CXL 3.2 Fusion Switch extends the range of memory that CPUs can expand and share over CXL to the rack level. This rack-scale memory expansion is enabled by the switch’s flexible connectivity, both between switches and between switches and other devices, while Panmnesia’s in-house low-latency CXL 3.2 controller, built into the chip, further optimizes performance. Panmnesia already has the PCIe 6.4-CXL 3.2 Fusion Switch in silicon.
“We are working with our ecosystem partners to build appliances that will bring large-scale memory fabrics based on the PCIe-CXL Fusion Switch into AI data centers sooner,” said Myoungsoo Jung, CEO of Panmnesia. “This MOU with Intel Korea is also part of our effort to speed up that process.”













