OCP Global Summit 2026: Credo Breaks the Memory Wall Using AMD Programmable Logic-Based AI Accelerators

Summary:

• Credo and AMD have built a working emulation platform running OmniConnect Weaver memory disaggregation on AMD Versal AI Edge Series Gen 2 adaptive SoC architecture
• The platform enables terabytes-class of LPDDR memory with very high capacity and bandwidth to a programmable-logic XPU over VSR links, on standard organic packaging with no silicon interposer
• Application software runs unmodified as the expanded memory is transparent above the controller

Credo Technology Group Holding Ltd, an innovator in providing connectivity at scale through fast, reliable, and energy-efficient system solutions, showcased high-performance memory scaling for programmable logic-based AI accelerators at the 2026 OCP Global Summit in San Jose.Credo demonstrated its OmniConnect Weaver memory fanout gearbox in a programmable logic-based environment, enabling high memory bandwidth and high memory capacity on an AMD Versal AI Edge Series Gen 2 adaptive SoC evaluation board. The system puts memory capacity and bandwidth previously only reserved for custom ASICs within the reach of programmable logic.

As AI inference workloads scale, memory bandwidth and capacity have become critical bottlenecks, often constraining performance more than compute throughput itself. Credo’s OmniConnect Weaver memory gearbox is designed to address this directly. The AMD Versal adaptive SoC platform provides a highly programmable environment with high performance for faster time to market. By integrating Credo’s OmniConnect technology, customers can break the memory ceiling with access to larger memory pools and increased memory throughput without fundamental changes to application software.

“Memory is what limits inference today, not compute, and the gap widens every generation” said Vishal Shah, VP, product, Credo. “By combining the versatile AMD Versal adaptive SoC platform with Credo’s OmniConnect Weaver memory expansion technology, we are enabling customers to build scalable memory architectures that can unlock higher performance and greater efficiency for next-gen AI systems.”

“As AI inference workloads scale, customers need a practical path to higher memory performance without sacrificing the flexibility that drove the need for a programmable logic design in the first place,” said Manuel Uhm, director, silicon marketing, adaptive and embedded computing group, AMD. “This collaboration with Credo demonstrates how customers can unlock more memory bandwidth and capacity on the AMD Versal AI Edge Series Gen 2 device while preserving the efficiency, power and time-to-market advantages of programmable logic-based designs.”