Phison Electronics Assigned Twenty-Four Patents

Memory control circuit unit, memory storage device, and clock signal control method
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12504914) developed by Huang; Ming-Chien, Hsinchu, Taiwan, for “memory control circuit unit, memory storage device, and clock signal control method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A clock signal control method is provided according to an exemplary embodiment of the disclosure. In the method, an access operation is executed on a volatile memory module through a memory interface circuit, and a duty cycle of a first clock signal is set according to a type of the access operation. Furthermore, the first clock signal is transmitted to the volatile memory module to execute the access operation.”

The patent application was filed on 2022-11-01 (17/978234).

Spread spectrum clock generator, memory storage device, and spread spectrum clock generation method adopting multiple frequency change rates
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12494788) developed by Li; Kun-Ruei, Taichung, Taiwan, and Wu; Jen-Chu, Hsinchu, Taiwan, for “spread spectrum clock generator, memory storage device, and spread spectrum clock generation method adopting multiple frequency change rates.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A spread spectrum clock generator, a memory storage device, and a spread spectrum clock generation method are provided. The method includes: generating a spread spectrum clock signal according to a reference clock signal and a control signal; and adjusting the control signal to change a frequency of the spread spectrum clock signal based on multiple frequency change rates, wherein an initial frequency change rate of the spread spectrum clock is greater than a frequency change rate of the spread spectrum clock within a target time range.”

The patent application was filed on 2023-10-20 (18/490767).

Multi-layer circuit board structure and memory storage device
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12495506) developed by Huang; Chun Ming, Yunlin County, Taiwan, and Chen; Yong Lin, New Taipei, Taiwan, for “multi-layer circuit board structure and memory storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A multi-layer circuit board structure and a memory storage device are disclosed. The multi-layer circuit board structure includes a first capacity component, a second capacity component, a first conductor, and a first via hole. The first via hole is connected to the first conductor. At a first layer of the multi-layer circuit board structure, a first capacity component and a second capacity component are arranged oppositely. The first capacity component is connected to a first extension part of the first conductor. The second capacity component is connected to a second extension part of the first conductor. The first via hole is connected to a third extension part of the first conductor, and the first via hole is disposed between the first capacity component and the second capacity component.”

The patent application was filed on 2024-02-27 (18/587951).

Decoding method, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12487881) developed by Huang; Bo Lun, Tainan, Taiwan, and Lin; Yu-Hsiang, Yunlin County, Taiwan, for “decoding method, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A decoding method, comprising: sending a first read command sequence corresponding to a host system to read a first physical unit of a physical unit group to obtain a first data frame; responding to a decoding failure of a first single-frame decoding performed on the first data frame, sending a plurality of second read command sequences to read a plurality of second physical units in the physical unit group to obtain a plurality of second data frames; respectively performing a second single-frame decoding on the second data frames; performing a XOR operation on the corresponding data frame of each physical unit of the physical unit group to obtain first error evaluation information; generating enhanced first error evaluation information based on the first error evaluation information; and performing a third single-frame decoding on the first data frame based on the enhanced first error evaluation information.”

The patent application was filed on 2024-02-06 (18/433407).

Memory management method, memory storage apparatus and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12461817) developed by Zeng; Shih-Jia, Hsinchu, Taiwan, Tang; Chen Yang, Taoyuan, Taiwan, Hsu; Chen-An, New Taipei, Taiwan, Wang; Chih-Wei, Tainan, Taiwan, and Lin; Wei, Taipei, Taiwan, for “memory management method, memory storage apparatus and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The present disclosure provides a memory management method, a memory storage apparatus and a memory control circuit unit. The method includes: performing a first operation on a plurality of physical units to obtain a quality estimation parameter corresponding to the physical units; establishing a check list according to the quality estimation parameter, wherein the check list records index information of a first physical unit among the physical units, and a number of the first physical unit is less than a total number of the physical units; and in response to a default condition being satisfied, performing a status scanning on the first physical unit according to the index information in the check list.”

The patent application was filed on 2024-04-02 (18/625174).

Decoding parameter updating method, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12443521) developed by Lin; Yu-Hsiang, Yunlin County, Taiwan, and Huang; Bo Lun, Tainan, Taiwan, for “decoding parameter updating method, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A decoding parameter updating method, a memory storage device, and a memory control circuit unit are disclosed. The method includes the following. A reading command sequence is sent to a rewritable non-volatile memory module to instruct reading of first data from a first physical unit based on multiple read voltage levels. A logical operation is performed on a first data group to obtain decoding index information corresponding to the first data group. The first data group includes the first data and second data read from a second physical unit. Error evaluation information corresponding to a first voltage interval among multiple voltage intervals is obtained according to the first data and the decoding index information. A first decoding parameter corresponding to the first voltage interval is updated according to the error evaluation information.”

The patent application was filed on 2024-02-16 (18/443304).

Clock and data recovery circuit module, memory storage device and signal calibration method
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12443218) developed by Liao; Yu-Chiang, Miaoli County, Taiwan, and Wu; Jen-Chu, New Taipei, Taiwan, for “clock and data recovery circuit module, memory storage device and signal calibration method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A clock and data recovery circuit module, a memory storage device and a signal calibration method are disclosed. The method comprises: receiving a reference clock signal and a first clock signal and detecting a first difference value between the reference clock signal and the first clock signal by a first detector; receiving a data signal and a second clock signal and detecting a second difference value between the data signal and the second clock signal by a second detector; generating a first clock signal and a second clock signal according to one of the first difference value and the second difference value; and adjusting one of the reference clock signal, the first clock signal and the second clock signal according to the second difference value.”

The patent application was filed on 2024-04-16 (18/637397).

Gold Finger connector and memory storage device
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12418121) developed by Ye; Zong-Sian, Penghu County, Taiwan, Hung; Yang-Tse, Hsinchu County, Taiwan, Chang; Jin-Jia, Taoyuan, Taiwan, and Wu; Bo-Yuan, New Taipei, Taiwan, for “gold Finger connector and memory storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A gold finger connector and a memory storage device are disclosed. The gold finger connector includes: a connector body, a pin carrier, a plurality of first pins, a plurality of second pins, and at least one signal shielding structure. The pin carrier is protruded out of the connector body. The first pins are disposed on a first surface of the pin carrier. The second pins are disposed on the first surface and at least partially staggered with the first pins. The at least one signal shielding structure is disposed on the pin carrier and configured to conduct at least one target pin in the second pins to at least one ground layer.”

The patent application was filed on 2022-12-01 (18/073546).

Layout structure of differential lines, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12417996) developed by Yang; Kang-Yun, Hung; Yang-Tse, Hsinchu County, Taiwan, Ku; Chao-Cheng, Taoyuan, Taiwan, and Lee; Li-Yuan, Taipei, Taiwan, for “layout structure of differential lines, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A layout structure of differential lines, a memory storage device and a memory control circuit unit are provided. The layout structure of the differential lines includes a wiring layer, a first wire and a second wire. The first wire is arranged on the wiring layer and configured to transmit a first differential signal. The second wire is arranged on the wiring layer and configured to transmit a second differential signal. A first end of the first wire and a first end of the second wire are coupled to a first electrical component. A second end of the first wire and a second end of the second wire are coupled to a second electrical component. The first end of the first wire has a first bending structure. One of the second end of the first wire and the second end of the second wire has a second bending structure.”

The patent application was filed on 2023-04-25 (18/306971).

Voltage control circuit module, memory storage device and voltage control method
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12417810) developed by Ku; Po-Chih, New Taipei, Taiwan, for “voltage control circuit module, memory storage device and voltage control method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A voltage control circuit module, a memory storage device, and a voltage control method are disclosed. The method includes: generating, by a first oscillation circuit, a first oscillation signal according to a feedback control signal; generating, by a second oscillation circuit, a second oscillation signal according to the feedback control signal; generating an output voltage according to the first oscillation signal and the second oscillation signal; generating the feedback control signal according to the output voltage; and locking at least one of a frequency difference and a phase difference between the first oscillation signal and the second oscillation signal according to the first oscillation signal and the second oscillation signal.”

The patent application was filed on 2024-02-06 (18/433421).

Decoding parameter updating method, memory storage device, and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12417145) developed by Lin; Yu-Hsiang, Yunlin County, Taiwan, and Zeng; Shih-Jia, Hsinchu, Taiwan, for “decoding parameter updating method, memory storage device, and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A decoding parameter updating method, a memory storage device, and a memory control circuit unit are provided. The method includes: sending a read command sequence to a rewritable non-volatile memory module to instruct to read first data from a first physical unit based on multiple read voltage levels; decoding the first data according to multiple decoding parameters to obtain second data, wherein the decoding parameters respectively correspond to multiple voltage intervals, and the voltage intervals are defined by the read voltage levels; obtaining first error evaluation information corresponding to a first voltage interval among the voltage intervals according to the first data and the second data; and updating a first decoding parameter corresponding to the first voltage interval according to the first error evaluation information.”

The patent application was filed on 2024-04-02 (18/624125).

Data writing methods, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12405731) developed by Cheng; Chun Teng, Miaoli County, Taiwan, Chien; Jia-Fan, Taichung, Taiwan, Hsu; Yu-Cheng, Yilan County, Taiwan, and Lin; Wei, Taipei, Taiwan, for “data writing methods, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method of writing data, including: obtaining a write instruction; writing a first data of write data to a target physical unit in a target word line of a plurality of word lines in accordance with the write instruction; after writing the first data, when the target word line has one or more empty physical units arranged after the target physical unit, selecting one or more further target physical unit respectively located in one or more further target word lines; and writing second data connected after the first data in the write data to the selected further target physical units, wherein the one or more further target word lines are arranged after the target word line.”

The patent application was filed on 2024-02-22 (18/583871).

Data storage method, host system and data storage system
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12393336) developed by Lin; Wei, Taipei, Taiwan, Syu; Jian Ping, Taichung, Taiwan, Chen; Szu-Wei, New Taipei, Taiwan, and Li; An-Cin, Taipei, Taiwan, for “data storage method, host system and data storage system.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage method, a host system, and a data storage system are disclosed. The method includes the following. An artificial intelligence (AI) model is executed. First data to be stored to a memory storage device is obtained. In response to the first data being generated by the AI model, second data is generated according to the first data, in which the second data includes the first data, and a data amount of the second data is greater than a data amount of the first data. A first write command is sent to the memory storage device according to the second data, so as to instruct the memory storage device to store the second data.”

The patent application was filed on 2023-09-06 (18/461534).

Read Voltage calibration method, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12386529) developed by Chen; Szu-Wei, New Taipei, Taiwan, Lin; Yu-Hung, Huang; I-Sung, Miaoli County, Taiwan, and Su; Po-Cheng, Hsinchu, Taiwan, for “read Voltage calibration method, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A read voltage calibration method, a memory storage device, a memory control circuit unit are provided, including: reading, according to a first read command, a first physical unit based on a first read voltage level to obtain first data, and the first read voltage level is a default read voltage level corresponding to the first physical unit or a first voltage difference exists between the first read voltage level and the default read voltage level; decoding the first data to obtain first error bit information; reading, according to a second read command, the first physical unit based on a second read voltage level to obtain second data, and a second voltage difference exists between the second read voltage level and the default read voltage level; decoding the second data to obtain second error bit information; calibrating the default read voltage level according to the first and second error bit information.”

The patent application was filed on 2023-06-16 (18/336911).

Method for storing data and parity data in different chip enabled regions, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12366963) developed by Yeh; Chih-Kang, Kinmen County, Taiwan, for “method for storing data and parity data in different chip enabled regions, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving at least one write command instructing to store target data from a host system; encoding the target data to generate parity data; and respectively storing the target data and the parity data in a first physical management unit and a second physical management unit, and each of the first physical management unit and the second physical management unit crosses multiple chip enabled (CE) regions. In addition, in the first physical management unit, first data is stored in a first chip enabled region among the chip enabled regions. In the second physical management unit, first parity data for protecting the first data is stored in a second chip enabled region among the chip enabled regions, and the first chip enabled region is different from the second chip enabled region.”

The patent application was filed on 2022-12-25 (18/088604).

Memory management method, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12366987) developed by Yeh; Yen Chen, Hsinchu, Taiwan, for “memory management method, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a data merge operation; selecting a plurality of first-type physical units and a second-type physical unit from a rewritable non-volatile memory module to execute the data merge operation, wherein a data capacity of each first-type physical unit is less than a data capacity of each second-type physical unit; during a first execution period of the data merge operation, copying first data from a first physical unit in a stable state among the first-type physical units to the second-type physical unit; and during the first execution period, storing second data from a host system to a second physical unit not in the stable state among the first-type physical units.”

The patent application was filed on 2023-06-12 (18/332774).

Decoding method based on replacement data with reduced data amount, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12360703) developed by Lin; Yu-Hsiang, Yunlin County, Taiwan, for “decoding method based on replacement data with reduced data amount, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending a plurality of read command sequences configured to instruct a rewritable non-volatile memory module to read a first physical unit by using a plurality of read voltage levels; after the read command sequences are sent, receiving first data from the rewritable non-volatile memory module, where the first data includes replacement data corresponding to a plurality of first bits reflecting a read result of a first memory cell by using the read voltage levels, and a data amount of the first data is less than a total data amount of the first bits; after the first data is received, performing data restoration on the first data to obtain a plurality of second bits; performing a decoding operation according to the second bits.”

The patent application was filed on 2024-01-02 (18/402671).

Regulator circuit module, memory storage device and voltage control method
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12353232) developed by Huang; Chien-Fu, Hsinchu, Taiwan, and Yi; Bing-Wei, Taichung, Taiwan, for “regulator circuit module, memory storage device and voltage control method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A regulator circuit module, a memory storage device, and a voltage control method are disclosed. The voltage control method includes: generating an output voltage according to an input voltage by a driving circuit; generating a feedback voltage according to the output voltage; and controlling the driving circuit by a first regulator circuit to adjust the output voltage in response to a current change caused by the feedback voltage.”

The patent application was filed on 2022-11-23 (17/992942).

Memory operation method including performing target calculation in memory storage device, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12353768) developed by Syu; Jian Ping, Taichung, Taiwan, Lin; Wei, Taipei, Taiwan, Chen; Szu-Wei, New Taipei, Taiwan, and Li; An-Cin, Taipei, Taiwan, for “memory operation method including performing target calculation in memory storage device, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory operation method, a memory storage device, and a memory control circuit unit are disclosed. The memory operation includes following steps. First data is received from a host system. The first data is stored into a first physical unit which is mapped to a first logical unit. In a first operation mode, a target calculation is performed based on the first data and second data stored in a second physical unit to obtain third data, and the third data is different from the first data. The third data is stored into a third physical unit which is also mapped to the first logical unit. The third data is transmitted to the host system.”

The patent application was filed on 2023-11-07 (18/504107).

Memory management method, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12346572) developed by Yeh; Chih-Kang, Kinmen County, Taiwan, for “memory management method, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory management method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: receiving first data from a host system; encoding the first data to generate first parity data based on a first code rate; storing the first data and the first parity data in a plurality of first physical management units; collecting second data from a rewritable non-volatile memory module; encoding the second data to generate second parity data based on a second code rate, wherein the first code rate is different from the second code rate; and storing the second data and the second parity data in a plurality of second physical management units.”

The patent application was filed on 2022-12-02 (18/073581).

Memory management method, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12321640) developed by Yeh; Yen Chen, Hsinchu, Taiwan, for “memory management method, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory management method, a memory storage device, and a memory control circuit unit are disclosed. The method is for a rewritable non-volatile memory module including first type physical units and second type physical units. The first type physical units adopt a first operation mode. The second type physical units adopt a second operation mode. The method includes: grouping a part of physical units in the second type physical units to a first reserved region and a second reserved region, and the physical units belonging to the first reserved region and the second reserved region are reserved for usage in a data merging operation; and performing a first data merging operation which includes: collecting first data from a source unit; selecting a target unit from the first reserved region or the second reserved region according to attribute of the source unit; and storing the first data to the target unit.”

The patent application was filed on 2023-07-11 (18/349962).

Method for adjusting a read voltage level or log likelihood ratio of a memory based on a calculated bit change ratio, memory controlling circuit unit, and memory storage device
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12314599) developed by Yang; Yu-Siang, New Taipei, Taiwan, Lin; Wei, Taipei, Taiwan, Zeng; Shih-Jia, Hsinchu, Taiwan, Liu; An-Cheng, Taipei, Taiwan, and Hsu; Yu-Cheng, Yilan County, Taiwan, for “method for adjusting a read voltage level or log likelihood ratio of a memory based on a calculated bit change ratio, memory controlling circuit unit, and memory storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data accessing method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: reading a codeword stored in a physical programming unit, and calculating a bit change ratio of a bit value change in dummy data included in the codeword; adjusting a read voltage level or a log likelihood ratio according to the bit change ratio; and performing a decoding operation on the codeword by using the adjusted read voltage level or the adjusted log likelihood ratio.”

The patent application was filed on 2021-06-02 (17/336347).

Data writing method for avoiding repeated writing, memory storage device, and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12307130) developed by Li; Wei-Cheng, Shen; Yu-Chung, Miaoli County, Taiwan, Xu; Jia-Li, New Taipei, Taiwan, and Chen; Ping-Cheng, Taoyuan, Taiwan, for “data writing method for avoiding repeated writing, memory storage device, and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a write command from a host system, and the write command including first data; checking a status of a first physical programming unit in a first physical erasing unit; in response to the status of the first physical programming unit being a first status, sending a first command sequence to a rewritable non-volatile memory module, and the first command sequence being configured to instruct the rewritable non-volatile memory module to store at least part of the first data to the first physical programming unit.”

The patent application was filed on 2022-10-17 (17/967884).

Memory management method, memory storage apparatus and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (12307101) developed by Liu; Yu-Heng, Hsinchu County, Taiwan, Yang; Yu-Siang, New Taipei, Taiwan, Li; Yao-Hsuan, Hsinchu County, Taiwan, Liu; An-Cheng, ,and Lin; Wei, Taipei, Taiwan, for “memory management method, memory storage apparatus and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory management method, a memory storage apparatus and a memory control circuit unit are disclosed. The method includes: sending a plurality of read command sequences including a first read command sequence and a second read command sequence, and the first read command sequence is configured to instruct a performing of a first read operation on a first physical unit of a rewritable non-volatile memory module, and the second read command sequence is configured to instruct a performing of a second read operation on the first physical unit; determining a system parameter according to a time interval between a first read time point corresponding to the first read operation and a second read time point corresponding to the second read operation; and instructing the rewritable non-volatile memory module to perform a specific operation according to the system parameter.”

The patent application was filed on 2024-03-15 (18/605832).