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Astera Labs’ Leo CXL Smart Memory Controllers on Microsoft Azure M-series VMs Overcome Memory Wall

Deployment of CXL-attached memory, addressing growing demands of memory-intensive workloads, including in-memory databases

Astera Labs, Inc. announced its Leo CXL Smart Memory Controllers enable customers to evaluate Compute Express Link (CXL) memory expansion capabilities for their specific workloads in the Azure M-series VMs preview.

Astera Labs Leo Microsoft Azure Intro

Microsoft’s Azure M-series VMs is an industry’s 1st announced deployment of CXL-attached memory, addressing the growing demands of memory-intensive workloads, including in-memory databases. As organizations process increasingly large datasets, traditional server architectures face a fundamental bottleneck known as the ‘memory wall.’ CXL technology breaks through this barrier by enabling memory expansion beyond the limitations of CPU-attached DRAM, providing cloud providers and enterprises with the flexibility to scale memory capacity and performance.

Astera Labs Leo Aries6

Leo CXL Smart Memory Controllers support CXL 2.0 with up to 2TB of memory capacity/controller, enabling cloud providers to scale server memory capacity by more than 1.5×. (1) This addresses enterprise workloads such as in-memory databases and big data analytics, while also enabling AI inference applications, KV Cache storage for LLMs, machine learning workloads, and recommendation systems where large-scale memory capacity significantly reduces total cost of ownership.

Our collaboration with Microsoft on CXL-attached memory for Azure M-Series virtual machines demonstrates our commitment to advancing memory connectivity solutions for cloud infrastructure,” said Thad Omura, CBO, Astera Labs. “By enabling dramatically higher memory capacities, we unlock performance and scalability for a growing list of AI and in-memory databases—applications where memory is the ultimate constraint. Astera Labs aims to advance memory connectivity innovations that redefine what’s possible in modern infrastructure.”

Addressing memory capacity constraints in cloud infrastructure requires deep collaboration to understand both the technical challenges and the operational demands of hyperscale deployment,” said Rajesh Sankaran, distinguished engineer and VP, Azure hardware systems and architecture, Microsoft Corp. “Astera Labs has been integral to advancing CXL capabilities for Azure, and their engagement—from early architectural discussions through platform integration—exemplifies the kind of collaboration essential for enabling new technologies.

(¹) Yuhong Zhong et al., TPP: Transparent Page Placement for CXL-Enabled Tiered Memory, USENIX OSDI

Resources:
Detailed specifications for Leo CXL Smart Memory Controllers   
More about value Astera Labs’ Leo CXL Smart Memory Controllers enable on Azure M-series VMs    
Blog: Explore how Astera Labs is advancing CXL with interoperable solutions    
Blog: Discover Astera Labs’ flexible CXL product suite for low-latency memory expansion

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