FMS 2025: XCENA Unveils MX1 Computational Memory Supporting PCIe 6.0 and CXL 3.2

XCENA, Inc., a South Korea–based startup, unveiled its 1st product, MX1 computational memory, at FMS 2025: the Future of Memory and Storage event.

The company is displaying MX1 at FMS (booth #734) and will be offering working samples to select partners starting in October 2025. A production-ready version is planned for 2026.

CXL, Foundation of MX1’s Architecture 
MX1 is a world’s 1st computational memory product supporting PCIe 6.0 and Compute Express Link (CXL) 3.2, the latest version of CXL, an open standard enabling high-speed, low-latency communication between CPUs, memory, and accelerators. MX1 brings compute capabilities closer to the memory layer to overcome the limitations of traditional memory hierarchies. This reduces the overhead of moving large volumes of data between memory and the CPU and allows data to be processed near where it resides — an architectural shift that improves overall system performance and reduces TCO in data centers. 

CXL introduces a more dynamic and flexible approach to system design. By supporting memory expansion, cache coherency, and direct memory access, the standard allows more efficient coordination across heterogeneous components. These capabilities form the foundation that MX1 builds on in order to scale data processing and reduce latency in demanding workloads. 

Under Hood: How MX1 Works 
MX1 utilizes near-data processing, incorporating 1,000s of in-house RISC-V cores within the chip to handle computation near memory. This approach minimizes CPU involvement in data movement, accelerating tasks such as vector database operations, data analytics, and memory-intensive queries. 

MX1 provides SSD-backed memory expansion, delivering PB-scale capacity with minimal latency overhead. It also incorporates advanced reliability features and hardware-assisted compression to maximize usable capacity.

Software Support and Developer Integration 
To maximize the benefits of MX1, software support is essential. XCENA provides a fully-integrated SDK comprised of low-level drivers, runtime libraries, and supporting tools to help developers evaluate, prototype, and deploy MX1 with minimal integration effort.  

The software stack ensures compatibility with standard system environments and development workflows, enabling adoption across data-intensive applications, from in-memory analytics to AI inference acceleration. 

As MX1 enters its proof-of-concept phase, XCENA invites developers, system architects, and partners to explore the new possibilities enabled by computational memory.  Together, the industry is moving one step closer to a more flexible and efficient performance computing paradigm. 

XCENA Wins Memory Innovation Award at FMS 2025 

The company was awarded the Most Innovative Memory Technology award at FMS 2025: the Future of Memory and Storage for its breakthrough innovation that addresses the ‘memory wall’ in modern computing systems. The award marks the company’s second consecutive recognition at the event, following its selection as Most Innovative Startup in 2024. 

“Computational Memory represents an emerging architectural approach that aims to accelerate performance and efficiency, particularly for data-intensive tasks. It does this by minimizing data movement between processing and memory components,” said Jay Kramer, chair, awards program, and president, Network Storage Advisors, Inc. “We are proud to recognize XCENA with MX1, the world’s first computational memory controller supporting CXL 3.X and enabling high-throughput acceleration for data intensive workloads like AI and analytics.“

FMS 2025 is currently taking place in Santa Clara, CA, from August 5-7, bringing together global leaders in memory and storage technology. As an exhibitor, XCENA is showcasing MX1 in booth #734 and engaging with prospective partners, customers, and developers.