Levono Assigned Two Patents
Data regeneration and storage in RAID storage system, far memory direct caching
By Francis Pelletier | July 11, 2025 at 2:00 pmData regeneration and storage in RAID storage system
Lenovo Global Technology (United States) Inc., Morrisville, NC, has been assigned a patent (12346570) developed by Cosby; David W, Velez; Wilson, Raleigh, NC, Caporale; Patrick L, Cary, NC, and Ushery, Jr.; Gerald C, Raleigh, NC, for a “data regeneration and storage in a RAID storage system.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A computer program product may cause a processor to perform various operations. The operations include identifying, via communication with a RAID controller that manages operation of an array of drives as a RAID storage system, one of the drives that has been compromised, a failed component of the identified drive that compromised the identified drive, and a failure domain associated with the failed component, wherein data stored within the failure domain associated with the failed component has become inaccessible. The operations further include instructing, in response to the failed component having a failure domain that satisfies a first condition, the RAID controller to perform a first recovery action that includes regenerating the inaccessible data using data from other drives within the array of drives and storing the regenerated data on available storage of the identified drive outside the failure domain associated with the failed component.”
The patent application was filed on 2023-03-31 (18/193921).
Far memory direct caching
Lenovo Global Technology (United States) Inc., Morrisville, NC, has been assigned a patent (12223169) developed by Hinkle; Jonathan, Raleigh, NC, for a “far memory direct caching.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A far memory device includes a far memory controller, a memory device coupled to the controller, a first port coupled to the far memory controller to support communication with a host processor over a first serial computer expansion bus, and a second port coupled to the far memory controller to support communication with a non-volatile data storage drive over a second serial computer expansion bus. The far memory device serves as a cache between the host processor and the non-volatile data storage drive and may perform aspects of cache management on behalf of the host processor.”
The patent application was filed on 2022-03-17 (17/696951).