Innogrit Technologies Assigned Six Patents

Method for finding common optimal reference voltage and memory storage system
Innogrit Technologies Co., Ltd., Shanghai, China, has been assigned a patent (12315584) developed by Choi; Youngjoon, and Chiang; Goyo, Shanghai, China, for “method for finding common optimal reference voltage and memory storage system.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “This application relates to the technical field of data storage, and discloses a method for finding a common optimal reference voltage and a memory storage-system. The method includes: providing a lookup table for optimal reference voltage offset of each programmed state of target memory and a 1-bit count difference voltage offset corresponding to predetermined 1-bit count index at different time intervals; when there is a NAND device of a memory storage system with UECC or bit error rate exceeding criteria, detecting current 1-bit count difference voltage offset corresponding to the predetermined 1-bit count index, and obtaining optimal reference voltage offset in the lookup table with the current 1-bit count difference voltage offset as index; and applying the corresponding reference voltage offset to initial common reference voltage of all NAND devices of the memory storage system. This application can accurately adjust the reference voltage.”

The patent application was filed on 2023-03-31 (18/194209).

Using HMB as cache of physical address mapping table
Innogrit Technologies Co., Ltd., Shanghai, China, has been assigned a patent (12287737) developed by Wu; Jian, Lai; Dishi, and Zhao; Yu, Shanghai, China, for “method and system of using HMB as a cache of physical address mapping table.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “This application discloses a method and system of using HMB as a cache of physical address mapping table. The method comprises: arranging physical addresses in order of logical addresses, physical mapping entries corresponding to a plurality of consecutive physical addresses form one table unit, and a logical address corresponding to a first entry of each table unit is used as an index of the table unit; determining HMB size, dividing all table units into a plurality of sections according to the HMB size, each section comprises a plurality of table units, each section is divided into a plurality of ways; calculating a metadata according to logical address corresponding to the first entry of the table unit to be stored and the HMB size, the metadata comprises a section number and a way number; writing the metadata and the table unit to be stored into the HMB. This application uses HMB as L2P address mapping table cache of SSD controller, saving or avoiding use cost of DRAM on SSD, and reducing SSD size.”

The patent application was filed on 2023-08-04 (18/365817).

Reading memory of storage device
Innogrit Technologies Co., Ltd., Shanghai, China, has been assigned a patent (12223205) developed by Yu; Hongsen, Chen; Shawn, San Jose, CA, Zhao; Gang, Chandler, AZ, Jiang; Wei, Fremont, CA, and Chen; Lin, Cupertino, CA, for “systems, methods and devices for reading a memory of a storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Disclosed herein are systems, methods and devices for controlling output of a storage device during read operations. The method comprises: measuring a length of a temporal gap between first and second consecutive read bursts from a storage device, the first and second read burst are in response to first and second read commands received by the storage device, respectively; generating a state code according to the length, wherein the state code has a first value when the length is zero, a second value when the length is equal to or shorter than a threshold time length but is non-zero, and a third value when the length is greater than the threshold time length; and controlling output of the storage device according to the state code.”

The patent application was filed on 2023-04-13 (18/134266).

Power and thermal management in SSD
Innogrit Technologies Co., Ltd., Shanghai, China, has been assigned a patent (12210753) developed by Zhao; Gang, Chandler, AZ, and Chen; Lin, Cupertino, CA, for “systems and methods for power and thermal management in a solid state drive.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems, apparatus and methods are provided for determining an optimal performance profile and a predicted temperature. A method may include receiving a command from a host. The command may contain a logical block address (LBA) for data stored in a data storage system, a length for a data size associated with the command, and a timestamp associated with the command. The method may further include obtaining LBA information, the timestamp, the data size from the command, providing the LBA information, the timestamp, the data size, along with temperature readings, and a performance profile as inputs to a machine learning model, determining an optimal performance profile and a predicted temperature using the machine learning model and configuring a storage controller with settings of the optimal performance profile.”

The patent application was filed on 2022-09-15 (17/945489).

Data writing method and apparatus, and storage medium
Innogrit Technologies Co., Ltd., Shanghai, China, has been assigned a patent (12159060) developed by Wei; Tao, Feng; Zhengtian, and Wei; Ke, Shanghai, China, for “data writing method and apparatus, and storage medium.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The present disclosure relates to a data writing method and apparatus of a NAND flash, and a storage medium. The method includes: for each channel in the NAND flash, pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs; and for each LUN pair, sequentially writing data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially writing data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair. Therefore, the transmission efficiency of a NAND bus can be improved, and the data writing performance of the NAND flash can be improved.”

The patent application was filed on 2022-06-02 (17/831126).

Soft decoding correctable page assisted reference voltage tracking
Innogrit Technologies Co., Ltd., Shanghai, China, has been assigned a patent (12136464) developed by Xiong; Chenrong, San Jose, CA, and Chen; Jie, Shanghai, China, for a “soft decoding correctable page assisted reference voltage tracking.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems and methods are provided for determining optimal read reference voltages used for reading data in non-volatile storage devices. A method may include reading data stored in a non-volatile storage device using a group of soft read reference voltages, decoding the data and obtaining the number of ones and number of zeros for each of a plurality of zones delineated by the soft read reference voltages, determining that one of the soft read reference voltages is a boundary of a zone in which a comparison result of the number of ones compared to the number of zeros is greater than zero and a boundary of another zone in which a comparison result is less than zero and setting the soft read reference voltage adjusted by an adjustment as an optimal read reference voltage. The adjustment may be obtained based on the two comparison results.”

The patent application was filed on 2022-07-06 (17/858357).