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R&D: Specific ADC of NVM-Based Computation-in-Memory for Deep Neural Networks

Present specific ADC and post-processing circuit of NVM-based CIM neural network

IEEE Transactions on Circuits and Systems I: Regular Papers has published an article written by Ao Shi; Yizhou Zhang; Lixia Han; Zheng Zhou; Yiyang Chen; Haozhang Yang; Lifeng Liu; Linxiao Shen; Xiaoyan Liu; Jinfeng Kang; and Peng Huang, School of Integrated Circuits, Peking University, Beijing, China, and Beijing Advanced Innovation Center for Integrated Circuits, Beijing, China.

Abstract: Non-volatile memory (NVM)-based Computation-in-memory has demonstrated a significant advantage in high-efficiency neural networks. However, the requirement of analog-to-digital converter (ADC) and post-processing circuits not only cost high energy and area but also results in high computation errors, which tradeoffs the performance boost brought by CIM. Here, we present a specific ADC and post-processing circuit of the NVM-based CIM neural network to address these issues. The main contributions include: (1) A novel residual charge accumulation function (RCA) is designed to achieve charge-domain summation of quantized partial sum and reduces 38% quantization error; (2) Charge reset is introduced in the integrate & fire circuit to realize < 1 LSB INL at ± 7 bits and a speed of 285MHz/LSB; (3) Sample & hold, current subtraction, and bidirectional counter are designed to improve 3.95 × energy efficiency and 2.48 × area efficiency. Evaluation based on the measured results of the fabricated chip shows that the VGG-11 neural network with the proposed ADC circuit can achieve a 3.28-time improvement in energy efficiency while maintaining the same network recognition rate.

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