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SK hynix Assigned Eight Patents

For PCIe interface device, method of operating and system

PCIe interface device and method of operating
SK hynix Inc., Icheon, Korea, has been assigned a patent (11841819) developed by Jeon, Yong Tae, Icheon, Korea, for peripheral component interconnect express interface device and method of operating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Provided are a Peripheral Component Interconnect Express (PCIe) interface device and a method of operating the same. The PCIe interface device includes a first buffer, a second buffer, and a buffer controller. The first buffer may be configured to store a plurality of first transaction layer packets received from multiple functions. The second buffer may be configured to store a plurality of second transaction layer packets received from the multiple functions. The buffer controller may be configured to, when a first buffer of a switch is full, realign an order in which the plurality of second transaction layer packets are to be output from the second buffer to the switch, based on IDs of the plurality of second transaction layer packets.

The patent application was filed on 2021-09-03 (17/467054).

PCIe device and operating method
SK hynix Inc., Icheon, Korea, has been assigned a patent (11815941) developed by Jeon, Yong Tae, and Park, Dae Sik, Icheon-si, Korea, for peripheral component interconnect express device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method of operating a Peripheral Component Interconnect Express (PCIe) device including a first port and a second port comprises: performing a first link training operation to link up a first host with a first link of the first port, operating in a single port mode when the first link training operation is completed, performing a lane reduce operation to reduce a lane corresponding to the first link in response to a mode change request received from the first host, and performing a second link training operation to link up a second host with a second link of the second port when a status of the first link is an L0 state.

The patent application was filed on 2021-11-15 (17/526995).

PCIe interface device and operating method
SK hynix Inc., Icheon-si, Korea, has been assigned a patent (11809344) developed by Jeon, Yong Tae, Icheon-si, Korea, for peripheral component interconnect express interface device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A Peripheral Component Interconnect Express (PCIe) interface device includes a PCIe layer and a PCIe controller. The PCIe layer performs communication between a host and a Direct Memory Access (DMA) device. The PCIe controller switches an operating clock from a PCIe clock generated based on a reference clock to an internal clock, processes data of the PCIe layer on the basis of the internal clock, and recovers a link with respect to the host, when a reset signal received from the host is asserted or the reference clock is off.

The patent application was filed on 2021-11-15 (17/527032).

PCIe device and computing system including same
SK hynix Inc., Icheon-si, Korea, has been assigned a patent (11797468) developed by Jeon, Yong Tae, Icheon-si, Korea, for peripheral component interconnect express device and computing system including the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A PCIe device setting, when a fail lane is detected during a link setting operation, a link by using remaining lanes includes a plurality of lanes comprising a plurality of ports, and a link controller setting a link including the plurality of lanes, wherein the link is set to have a link width that includes remaining lanes, except for a fail lane from among the plurality of lanes, wherein the fail lane from among the plurality of lanes has a state in which the fail lane is unable to form a link with remaining lanes that have not failed from among the plurality of lanes.

The patent application was filed on 2021-10-21 (17/506889).

PCIe interface system and method of operating
SK hynix Inc., Icheon-si, Korea, has been assigned a patent (11789658) developed by Jeon, Yong Tae, Icheon-si, Korea, for peripheral component interconnect express (PCIe) interface system and method of operating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A peripheral component interconnect express (PCIe) interface system is provided to include a PCIe interface device, a host, and a non-volatile memory express (NVMe) device connected to the host through the interface device. The host includes a host memory configured to store information on a command to be executed on the NVMe device and a command that has been executed on the NVMe device, and an NVMe driver configured to transmit the command to be executed on the NVMe device to the host memory, and output a doorbell signal indicating that the command to be executed on the NVMe device has been stored in the host memory to the NVMe device. The NVMe device requests to the host memory to register a lightweight notification (LN) indicating a position in which the command to be executed on the NVMe device is stored.

The patent application was filed on 2021-11-09 (17/522810).

PCIe interface and interface system
SK hynix Inc., Icheon-si, Korea, has been assigned a patent (11782792) developed by Jeon, Yong Tae, Park, Dae Sik, and Jang, Jae Young, Icheon-si, Korea, for PCIe interface and interface system.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A device is provided to include: a transceiver configured to transmit and receive data, and a skip ordered set (SKP OS) control logic in communication with the transceiver and configured to generate an SKP OS and control the transceiver to transmit the SKP OS and a data block to a link connecting to an external device and including a plurality of lanes. The SKP OS control logic is configured to increase or decrease transmission interval of the SKP OS based on a transmission history of the SKP OS, in response to an entry of the link to a recovery state that is used to recover the link from an error.

The patent application was filed on 2021-06-17 (17/350885).

PCIe interface device and method of operating
SK hynix Inc., Icheon-si, Korea, has been assigned a patent (11782497) developed by Yang, Ji Woon, and Jeon, Yong Tae, Icheon-si, Korea, for Peripheral component interconnect express (PCIE) interface device and method of operating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A peripheral component interconnect express (PCIe) interface device is provided to include: a root complex configured to support a PCIe port, a memory connected to an input/output structure through the root complex, a switch connected to the root complex through a link and configured to transmit a transaction, and an end point connected to the switch through the link to transmit and receive a packet. The PCIe interface device may perform a link power management by changing a state of the link in response to a detection of an idle state of the link.

The patent application was filed on 2021-11-09 (17/522827).

PCIe interface device and system including same
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (11726870) developed by Jeon, Yong Tae, Park, Gil Bong, and Seong, Dong Jin, Gyeonggi-do, Korea, for peripheral component interconnect express interface device and system including the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Provided herein is a PCIe interface device. The PCIe interface device may include a NOP DLLP generator configured to generate a No Operation (NOP) data link layer packet (DLLP) including event information representing an event in response to the occurrence of the event and a transmitter configured to transmit the NOP DLLP to an external device through a link including a plurality of lanes.

The patent application was filed on 2021-07-20 (17/380593).

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