Winbond Electronics Assigned Four Patents

Write method for resistive memory
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11520526) developed by Wang, Ping-Kun, Liao, Shao-Ching, Wu, Chien-Min, Ho, Chia Hua, Chen, Frederick, Chao, He-Hsuan, and Lim, Seow-Fong, Taichung, Taiwan, for a “write method for resistive memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A write method for a resistive memory including a storage array, a control circuit and an access circuit is provided. The control circuit receives an external command to activate the access circuit to access the storage array. The write method includes determining whether the external command is ready to perform a write operation for the storage array, generating a first operation voltage group to the access circuit when the external command does not perform the write operation for the storage array, reading a count value of a block that corresponds to a write address when the external command performs the write operation for the storage array, wherein the count value indicates the number of times that the block corresponding to the write address performs the write operation, and generating a second operation voltage group to the access circuit according to the count value of the block.”

The patent application was filed on 2021-06-02 (17/337003).

Memory storage apparatus and operating method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11501807) developed by Chiang, Ju-An, and Chang, Ya-Wen, Taichung, Taiwan, for “memory storage apparatus and operating method thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory storage apparatus including a memory circuit and a memory controller is provided. The memory circuit is configured to store data. The memory controller is coupled to the memory circuit via a data bus. The memory controller performs initial setting of the memory circuit on the basis of a width of the data bus. In addition, an operating method of a memory storage apparatus is also provided.”

The patent application was filed on 2021-06-08 (17/341387).

Power down detection circuit and semiconductor storage
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11502680) developed by Arakawa, Kenichi, Kanagawa, Japan, for “power down detection circuit and semiconductor storage apparatus.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A power down detection circuit and a semiconductor storage apparatus, which can adjust a power down detection level while suppressing temperature dependence, are provided. The power down detection circuit includes a BGR circuit, a trimming circuit, a resistance division circuit, and a comparator. The BGR circuit generates a reference voltage based on a supply voltage. The trimming circuit adjusts the reference voltage based on a trimming signal to generate a reference voltage for power down detection. The resistance division circuit generates an internal voltage lower than the supply voltage. The comparator detects that the internal voltage is lower than the reference voltage for power down detection and outputs a reset signal.”

The patent application was filed on 2021-04-22 (17/238183).

Resistive memory storage and operating method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11437101) developed by Lin, Lih-Wei, Cheng, Lung-Chi, Cheng, Ju-Chieh, and Kuo, Ying-Shan, Taichung, Taiwan, for “resistive memory storage apparatus and operating method thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A resistive memory storage apparatus including a memory cell, a selecting transistor and a memory controller is provided. The memory cell outputs a writing current during a writing pulse width period. The selecting transistor is coupled to the memory cell. The memory controller is coupled to the selecting transistor and the memory cell. The memory controller is configured to apply a control voltage that gradually changes to a predetermined voltage level to a control end of the selecting transistor during a resistance transition phase of the writing pulse width period and set the control voltage to the predetermined voltage level during a filament stabilization phase after the resistance transition phase, so as to limit the writing current to a predetermined current value. In addition, an operating method for a resistive memory storage apparatus is also provided.”

The patent application was filed on 2021-04-08 (17/226052).