RayMX Microelectronics Assigned Two Patents

Storage device, memory controller circuit, and monitoring
RAYMX Microelectronics, Corp., Anhui Province, China, has been assigned a patent (10,594,366) developed by Wu, Jo-Hua, Pingtung County, Taiwan, and Chen, Cheng-Yu, New Taipei, Taiwan, for “storage device, memory controller circuit, and monitoring method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device includes a power line communication, (PLC) circuit and a storage controller. The PLC circuit is coupled to a power line. The storage controller is coupled to the PLC circuit. The storage controller is configured to access a plurality of memory block. The PLC circuit is configured to carry at least one signal outputted from the storage controller on the power line, in order to transmit the at least one signal to an external device such that an operational state of the data storage device can be debugged/monitored.”

The patent application was filed on March 28, 2019 (16/367,393).

Memory control device and memory control
RayMX Microelectronics, Corp., Hefei, Anhui Province, China, has been assigned a patent (10,566,065) developed by Hsieh, Yi-Lin, Changhua, Taiwan, Xiao, Jing-Long, Tainan, Taiwan, Chen, Cheng-Yu, and Lin, Wang-Sheng, New Taipei, Taiwan, for “memory control device and memory control method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory control device includes a memory and a controller. The memory includes a plurality of memory blocks. The controller is coupled to the memory and configured to select a first memory block from the memory blocks and program data into the first memory block. When the memory control device is deactivated and re-activated, the controller is further configured to read a voltage distribution of the first memory block to determine a deactivation interval, and determine a reference time according to the deactivation interval and an initial time, and the voltage distribution of the first memory block correspond to the data.”

The patent application was filed on September 20, 2018 (16/136,492).