LSI Assigned Four Patents

Explicit data segment boundaries with SCSI I/O referrals
LSI Corp., San Jose, CA, has been assigned a patent (8,527,718) developed by four co-inventors for "explicit data segment boundaries with SCSI I/O referrals."

The co-inventors are Ross Zwisler, Lafayette, CO, Andrew J. Spry, Wichita, KS, Gerald J. Fredin, Wichita, KS, and Kenneth J. Gibson, Lafayette, CO.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for communication between an initiator system and a block storage cluster may include receiving a first command at a first storage system included in a plurality of storage systems of the block storage cluster. The method may also include transmitting a referral response from the first storage system to the initiator system when at least a portion of the data associated in the first command is stored by a second storage system. The method may further include obtaining a segment start value and a corresponding port identifier based on the referral response, and directing a second command to at least a second storage system included in the plurality of storage systems of the block cluster."

The patent application was filed on March 31, 2009 (12/384,028).

Aligned storage
for network attached media streaming systems
LSI Corp., Milpitas, CA, has been assigned a patent (8,521,955) developed by seven co-inventors for an "aligned storage for network attached media streaming systems."

The co-inventors are Ambalavanar Arulambalam, Macungie, PA, Richard J. Byrne, Hillsborough, NJ, Jeffrey L. Timbs, Austin, TX, Nevin C. Heintze, Worthington, OH, Silvester Tjandra, Eu Gene Goh, Singapore, and Nigamanth Lakshiminarayana, Bangalore, India.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Described embodiments provide a server for transferring data packets of streaming data sessions between devices. A redundant array of inexpensive disks (RAID) array having one or more stripe sector units (SSU) stores media files corresponding to the one or more data sessions. The RAID control module receives a request to perform the write operation to the RAID array beginning at a starting storage address (DSA) and pads the data of the write operation if the amount of data is less than a full SSU of data, such that the padded data of the write operation is a full SSU of data. The RAID control module stores the full SSU of data beginning at a starting storage address (DSA) that is aligned with a second SSU boundary, without performing a read-modify-write operation."

The patent application was filed on March 3, 2011 (13/039,642).

Relative heat index based hot data determination
for block based storage tiering
LSI Corp., San Jose, CA, has been assigned a patent (8,478,939) developed by Anant Baderdinni, Lawrenceville, GA, for a "relative heat index based hot data determination for block based storage tiering."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Disclosed is a process for determining a heat index for a block of data, such as an extent, for storage tiering. Weighted scores are used for read and write operations, since solid state devices operate better with read operations than write operations. The heat index associated with each extent is a function of a base score, rather than an absolute value. The base score is determined by adding the number of extents in a hot tier plus the access score, divided by the number of extents in the hot tier. In this fashion, the base score measures the weighted I/O activity relative to the size of the hot tier."
 
The patent application was filed on July 7, 2011 (13/178,258).

Write-side intercell interference mitigation
in flash memories
LSI Corp., San Jose, Calif., has been assigned a patent (8,526,230) developed by six co-inventors for "methods and apparatus for write-side intercell interference mitigation in flash memories."

The co-inventors are Erich F. Haratsch, Bethlehem, PA, Milos Ivkovic, Sunnyvale, CA, Victor Krachkovsky, Allentown, PA, Nenad Miladinovic, Campbell, CA., Andrei Vityaev, San Jose, CA., and Johnson Yen, Fremont, CA.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and apparatus are provided for write-side intercell interference mitigation in flash memories. A flash memory device is written by obtaining program data to be written to at least one target cell in the flash memory; obtaining one or more bits of program data for at least one aggressor cell to be programmed later than the target cell: and precompensating for intercell interference for the target cell by generating precompensated program values. The aggressor cells comprise one or more cells adjacent to the target cell, such as adjacent cells in a same wordline as the target cell and/or cells in an upper or lower adjacent wordline to the target cell. The precompensated program values for the target cell are optionally provided to the flash memory."

The patent application was filed on June 30, 2009 (13/001,286).