LSI Assigned Four Patents

Tuning storage system performance
based on detected patterns of block level usage
LSI Corp., San Jose, CA, has been assigned a patent (8,495,324) developed by Scott W. Kirvan, and Yanling Qi, Austin, TX, for "methods and structure for tuning storage system performance based on detected patterns of block level usage."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and structure within a storage system for tuning performance of the storage system based on monitored block level access within the storage system. Block level access, either in cache memory or on the storage devices of the storage system, is monitored to detect patterns of access and/or data that correspond to an identified host system program. Based on the identified host system program, a profile of desired storage device configuration information is selected by the storage system. The profile comprises information identifying optimal configuration of a logical volume used by the corresponding host system program. Reconfiguration options are identified from the profile information and used either to automatically reconfigure the logical volume or are presented to a user to permit the user to select desired options from the reconfiguration options."

The patent application was filed on Nov. 16, 2010 (12/947,617).

I/O path virtualization between RAID controller
and environment service module in SAN
LSI Corp., Milpitas, CA, has been assigned a patent (8,473,648) developed by four co-inventors for a "system and method of I/O path virtualization between a RAID controller and an environment service module in a SAN."

The co-inventors are Madhukar Gunjan Chakhaiyar, Gaya, India, Mahmoud K. Jibbe, Wichita, KS, Dhishankar Sengupta, Yelachenahalli, India, and Himanshu Dwivedi, Bangalore, India.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method of I/O path virtualization between a RAID controller and an environment service module (ESM) in a SAN (SAN) is disclosed. In one embodiment, a type of I/O request is identified by an input/output control engine upon receiving an I/O request from a host computer via a RAID controller. Further, a priority is assigned to the received I/O request based on the type of I/O request by the I/O control engine. Furthermore, the processing of the prioritized I/O request is interrupted by the I/O control engine. In addition, the prioritized I/O request is separated into a command I/O request or a status request. Also, the separated command I/O request or the status request is sent to an associated queue in a plurality of solid state drive (SSD) buffer queues (SBQ) in the I/O control engine."

The patent application was filed on Dec. 16, 2010 (12/969,601).

Storage apparatus for multi-tiered data security
LSI Corp., Allentown, Pa., has been assigned a patent (8,473,516) developed by Lloyd W. Sadler, Allentown, PA, for a "computer storage apparatus for multi-tiered data security."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A computer storage apparatus. In one embodiment, the apparatus includes: (1) primary file storage, (2) a controller coupled to said primary file storage and configured to provide an interface by which data is communicated therewith, (3) formula/offset file storage coupled to said controller and configured to store at least one formula/offset and (4) pointer file storage coupled to said controller and configured to store at least one pointer, said controller further configured to provide said interface based on interaction with said formula/offset file storage and said pointer file storage."

The patent application was filed on March 25, 2009 (12/411,391).

Determining cache size in storage system
LSI Corp., San Jose, CA, has been assigned a patent (8,458,399) developed by Donald R. Humlicek, Wichita, KS, Timothy R. Snider, Derby, KS, and Brian D. McKean, Longmont, CO, for "methods and structure for determining cache size in a storage system."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and structure for automated determination and reconfiguration of the size of a cache memory in a storage system. Features and aspects hereof generate historical information regarding frequency of hits on cache lines in the cache memory. The history maintained is then analyzed to determine a desired cache memory size. The historical information regarding cache memory usage may be communicated to a user who may then direct the storage system to reconfigure its cache memory to a desired cache memory size. In other embodiments, the storage system may automatically determine the desired cache memory size and reconfigure its cache memory. The method may be performed automatically periodically, and/or in response to a user’s request, and/or in response to detecting thrashing caused by least recently used (LRU) cache replacement algorithms in the storage system."

The patent application was filed on Nov. 17, 2010 (12/948,321).