R&D: Five Articles on Different Memories Technologies

R&D: Magnetic exchange coupled nonreciprocal devices for cryogenic memory
Authors present a versatile device platform to develop such nonvolatile memory devices consisting of an exchange-coupled ultra-thin superconductor encapsulated between two ferromagnetic insulators (Fis).

arXiv has published an article written by Josep Ingla-Ayn´es, Francis Bitter Magnet Laboratory and Plasma Science and Fusion Center, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, USA, Lina Johnsen Kamra,Department of Physics, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, USA, Franklin Dai, Newton North High School, Newton, Massachusetts 02460, USA, Yasen Hou, Shouzhuo Yang, Peng Chen, Francis Bitter Magnet Laboratory and Plasma Science and Fusion Center, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, USA Oleg A. Mukhanov,SEEQC, Inc., Elmsford, New York 10523, USA, and Jagadeesh S. Moodera, Francis Bitter Magnet Laboratory and Plasma Science and Fusion Center, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, USA, and Department of Physics, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, USA.

Abstract: “As computing power demands continue to grow, superconducting electronics present an opportunity to reduce power consumption by increasing the energy efficiency of digital logic and memory. A key milestone for scaling this technology is the development of efficient superconducting memories. Such devices should be nonvolatile, scalable to high integration density and memory capacity, enable fast and low-power reading and writing operations, and be compatible with the digital logic. We present a versatile device platform to develop such nonvolatile memory devices consisting of an exchange-coupled ultra-thin superconductor encapsulated between two ferromagnetic insulators (FIs). The superconducting exchange coupling, which is tuneable by the relative alignment between the FI magnetizations, enables the switching of superconductivity on and off. We exploit this mechanism to create a superconducting nonvolatile memory where single-cell writing is realized using heat-assisted magnetic recording, and explain how it can become a contender for state-of-the-art superconducting memories. Furthermore, below their critical temperatures, the memory elements show a marked nonreciprocity, with zero magnetic field superconducting diode efficiencies exceeding \pm60%, showing the versatility of the proposed devices for superconducting computing.“

R&D: Coupled Simulation Methodology for In-Memory Computing Systems
With this co-simulation approach, devices and circuits can be optimized for their application, for example, with regard to energy efficiency. It can also be extended to a multi-level simulation flow.

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits has published an article written by Daniel Schön, Peter Grünberg Institut (PGI-7), Forschungszentrum Jülich GmbH, Jülich, Germany, Christian Owusu-Afriyie, Quang Huy Nguyen, Rainer Leupers, Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany, Stephan Menzel, Peter Grünberg Institut (PGI-7), Forschungszentrum Jülich GmbH, Jülich, Germany, and Melvin Galicia, Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany.

Abstract: “Simulations for the development and optimisation of future in-memory computing systems often face the problem that the modelling of the large system is desired, but at the same time the effects at the device level, should also be taken into account. Such effects could be due to the material properties and geometries of the nanoscale structures, which are too time-consuming to model in a system-level simulation. For certain problems and applications, however, it is advantageous or even essential that a high-level model responds to the details of a low-level model. In this paper, we present a coupled simulation methodology to overcome this challenge. In a case study, we show the integration of a material-level memristor simulation, serving as a vector matrix multiplication unit, into a system-level simulation. The simulation process between two distributed simulators is controlled by a co-simulation interface which we present here. With this co-simulation approach, devices and circuits can be optimized for their application, for example, with regard to energy efficiency. It can also be extended to a multi-level simulation flow.“

R&D: Resistive switching properties of metal/Bi₂Sr₂CaCu₂O_8+δ heterostructures
Study provides important insights into the multi-physical mechanisms in Bi-2212-based RS devices, supporting their application in advanced memory technologies.

Ceramics International has published an article written by Yizheng Lu, School of Materials Science and Engineering, Xi’an University of Technology, 5 Jinhua South Road, Xi’an, Shaanxi, 710048, China, Jiqiang Jia, School of Materials Science and Engineering, Xi’an University of Technology, 5 Jinhua South Road, Xi’an, Shaanxi, 710048, China, and Advanced Materials Analysis and Test Center, Xi’an University of Technology, 5 Jinhua South Road, Xi’an, Shaanxi, 710048, China, Tianjian Mi, School of Materials Science and Engineering, Xi’an University of Technology, 5 Jinhua South Road, Xi’an, Shaanxi, 710048, China, and Li Lei, Advanced Materials Analysis and Test Center, Xi’an University of Technology, 5 Jinhua South Road, Xi’an, Shaanxi, 710048, China.

Abstract: “Resistive switching (RS) memory is regarded as a promising candidate for next-generation non-volatile memory and neuromorphic computing, owing to its high density, fast speed, and excellent stability. In this work, epitaxial Bi₂Sr₂CaCu₂O_8+δ (Bi-2212) films are grown on LaAlO₃ substrates, and Ag/Bi-2212/Pt, Pt/Bi-2212/Pt, Ag/Bi-2212/Ag, as well as a micropatterned Pt/Bi-2212/Bi-2212/Pt structure are fabricated. Among these, the Ag/Bi-2212/Pt device demonstrates the highest performance with stable bipolar RS, which is attributed to the modulation of the interfacial Schottky barrier and electric-field-induced oxygen vacancy migration. Symmetric electrode structures show reduced performance due to unsuitable barrier configurations, while an overly thick active layer leads to increased operating voltages. Based on I-V characterization, the RS mechanism is explained by a synergistic effect of conductive filament formation and barrier modulation. Discrete current jumps are observed and are ascribed to the progressive breakdown of insulating barriers within Bi-2212. This study provides important insights into the multi-physical mechanisms in Bi-2212-based RS devices, supporting their application in advanced memory technologies.“

R&D: New Memory Architectures Will Drive Future Computing
By Jim Handy, and Thomas Coughlin

Computer has published an article written by Jim Handy, General director, Objective Analysis, Los Gatos, CA, USA, and Thomas Coughlin, President, Coughlin Associates, San Jose, CA, USA.

Abstract: “Modern computing is undergoing radical changes, many to enable artificial intelligence applications. But continued computing advances will require even greater changes. Just what are these changes, and how will tomorrow’s memory architectures and new memory technologies move the industry past today’s memory wall?“

R&D: Achieving Both Performance and Reliability in an Asymmetric File System on Disaggregated Persistent Memory
Authors introduce Ethane+, a rack-scale, distributed file system built on disaggregated persistent memory (DPM).

ACM Transactions on Storage has published an article written by Miao Cai, Junru Shen, College of Computer Science and Technology, Nanjing University of Aeronautics and Astronautics, Nanjing, China, and Baoliu Ye, State Key Laboratory for Novel Software Technology, Nanjing University, Nanjing, China.

Abstract: “The ultra-fast persistent memories (PMs) promise a practical solution toward high-performance distributed file systems. This article examines and reveals a cascade of performance and reliability issues in the current PM provision scheme, which not only underutilizes fast PM devices but also leads to severe consequences, such as throughput degradation, load imbalance, and even service outage. To remedy these, we introduce Ethane+, a rack-scale, distributed file system built on disaggregated persistent memory (DPM). Through resource separation using fast data connection technologies, DPM achieves efficient and cost-effective PM sharing while supporting strong fault isolation. To unleash such hardware potentials, Ethane+ incorporates an asymmetric file system architecture inspired by the imbalanced resource provision feature of DPM. It splits a file system into a control-plane FS and a data-plane FS, and designs these two planes with dual goals of best hardware utilization and hardening file system reliability. Evaluation results demonstrate that Ethane+ reaps the DPM hardware benefits, performs up to 60× better than modern distributed file systems, resists both software and hardware faults, and improves data-intensive application throughputs by up to 15×.“