DesignCon 2026: Keysight to Showcase Advanced AI Data Center and High-Speed Interconnect Validation

Keysight Technologies, Inc. will showcase end-to-end solutions enabling AI system design, interoperability validation, and large-scale performance at DesignCon 2026, Santa Clara Convention Center, CA, February 24-26, 2026. From advanced packaging and chiplets to PCIe, memory, and USB4 validation, the demos demonstrate how to overcome physical limits, ensure compliance, and de-risk designs early. The journey culminates with 1.6T interconnect benchmarking and validation of emerging AI fabrics, giving customers confidence their designs will perform at system scale while accelerating time to deployment.

Demonstrations include:

Chiplet 3D Interconnect Designer: Demonstrates a chiplet and 3D IC design workflow that accelerates multi-die interconnect development for AI and high-performance devices
Signal Integrity at 3.2T Speeds: The demo pairs the Physical Layer Test System (PLTS2026) with the NA5307A Frequency Extender (250GHz) and supporting tools to show the bandwidth and accuracy needed for next-gen infrastructure validation, helping accelerate time-to-market
Next Gen Memory Validation: Highlights measurement solutions for AI workloads through memory demos, including a live DDR5 system for mainstream electrical validation and a GDDR7 PAM3 signal integrity setup utilizing the new SNDR and jitter measurement suite to streamline compliance and debug
Reliable PCIe PAM4 Performance: Showcases the company’s next-gen PCIe test solutions for PCIe 7.0, spanning both electrical (PHY) and protocol-layer validation. The demo highlights how the UXR-Series oscilloscope, M8050A BERT platform, and PCIe test software accelerate debug, improve margin analysis, and enhance link reliability

448Gb Pathfinding: This solution advances signal integrity research by leveraging the M8199B arbitrary waveform generator and the N1046A electrical channel module to generate and analyze PAM4, PAM6, and PAM8 signals. Together, they enable researchers to evaluate signaling trade-offs and optimize modulation strategies for next-gen interconnect architectures

1.6T Interconnects for AI Networks: Demonstrates how the INPT-1600GE benchtop test system helps engineers ensure performance and reliability by validating BER and FEC, measuring link quality, and benchmarking AI workloads

UALink and Scale-Up Ethernet for AI Infrastructure: Highlights company’s automation, validation, and compliance solutions for 1.6T-class electrical networking interfaces, enabling automated test workflows, expanded measurement coverage, and streamlined calibration for conformance and debug

The company will participate in 16 paper, panel, and tutorial presentations, as well as nine talks, via the Keysight Educational Forum on Feb. 25 in the Great America K Ballroom.