R&D: Charge-domain Content Addressable Memory based on Ferroelectric Capacitive Memory for Reliable and Energy-efficient One-shot Learning
Work proposes transferring the computation to charge domain using ferroelectric capacitive memory (FCM)
This is a Press Release edited by StorageNewsletter.com on November 25, 2025 at 2:00 pmNature Communications has published an article written by Zuopu Zhou, Department of Electrical and Computer Engineering, National University of Singapore, Singapore, Singapore, Hongtao Zhong, Department of Electronic Engineering, Tsinghua University, Beijing, China, Leming Jiao, Department of Electrical and Computer Engineering, National University of Singapore, Singapore, Singapore, Zijie Zheng, Department of Electrical and Computer Engineering, National University of Singapore, Singapore, Singapore, Huazhong Yang, Department of Electronic Engineering, Tsinghua University, Beijing, China, Thomas Kämpfe, Center Nanoelectronic Technologies, Fraunhofer IPMS, Dresden, Germany, Kai Ni, Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA, Xueqing Li, Department of Electronic Engineering, Tsinghua University, Beijing, China, and Xiao Gong, Department of Electrical and Computer Engineering, National University of Singapore, Singapore, Singapore, and Institute of Microelectronics, Agency for Science, Technology and Research, Singapore, Singapore.
Abstract: “Non-volatile content addressable memories (NV-CAMs) accelerate memory augmented neural networks (MANNs) for brain-like efficient learning from a few examples or even one example. However, most existing NV-CAMs operate in current domain, posing challenges in reliable, low-power, and sensing-friendly Hamming distance (HD) computation. To address these challenges, this work proposes transferring the computation to charge domain using ferroelectric capacitive memory (FCM). For the first time, a charge-domain 2FCM CAM based on the inversion-type FCM is reported. By storing data as device capacitance, this CAM structure directly outputs HD as linear multi-level voltages, enabling simplified sensing processes and reduced peripheral costs. Its differential nature further exhibits immunity to device variation, ensuring accuracy in the computation of long data vectors. Parallel 16-bit HD computation using a fabricated 16 × 16 2FCM CAM array is experimentally demonstrated with record performance at array level, evidencing the superiority of charge-domain computation and showcasing tremendous potential for in-memory-search applications.“










