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R&D: NAND Flash Memory Scaling and Process Technology Modeling

Work discusses trends in the scaling of NAND flash memory, and process technology modeling applications relevant to the development of 3D NAND.

ACM Digital Library has published, in GLSVLSI ’25: Proceedings of the Great Lakes Symposium on VLSI 2025, an article written by Mark Kraman, Matt Zhu, and Yan Li, Sandisk Technologies, Inc., Milpitas, USA.

Abstract: “Semiconductor technology development involves managing cost and cycle time in all phases of pre-development, development, ramp, and high volume manufacturing. As NAND flash memory generations progress, fabrication complexity grows, incentivizing the use of advanced predictive modeling to mitigate development risks. To peruse continued innovation efficiently, therefore, NAND memory integrated device manufacturers with the industry together have embraced semiconductor process and device modeling tools to digitize the manufacturing processes of the fab and enable predictive modeling for new device structure concepts, process flow variants, and retrospective defect modeling. This work discusses trends in the scaling of NAND flash memory, and process technology modeling applications relevant to the development of 3D NAND, covering successes and developmental opportunities specifically relating to leading-edge node technology development and pathfinding.“

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