R&D: Reversible Memory Operation of Al/TeO2-ZnO-Au/ TeO2-ZnO/p-Si MIS Structures

IEEE Xplore has published, in 2024 38th Symposium on Microelectronics Technology and Devices (SBMicro) proceedings, an article written by José Augusto Martins Garcia; Leonardo Bontempo; Daniel Keij Kumada; Escola Politécnica da USP, Universidade de São Paulo, São Paulo, Brazil, Luciana Reyes Pires Kassab; Departamento de Ensino Geral, Faculdade de Tecnologia de São Paulo, São Paulo, Brazil, and Sebastião Gomes Dos Santos Filho,LSI/PSI/EPUSP, Universidade de São Paulo, São Paulo, Brazil.

Abstract: “This study investigates the reversible memory operation of Al/TeO 2 -ZnO-Au/ TeO 2 -ZnO/p-Si MIS structures using a TeO 2 -ZnO (TeZnO) matrix in the interface of the p-Si substrate and a thicker TeO 2 -ZnO-Au (TeZnO-Au) composite (~ 170 nm). From C-V electrical characterization, it was shown a charging and de-charging process of the TeZnO/TeZnO-Au interface. During the forward sweep from −2 V to 2V of the C–V acquisition, electrons are injected into the TeZnO/TeZnO-Au interface which promotes a charging process corresponding to an increase of the flat band voltage from ~0.25 V to ~0.50 V. I–V electrical characterization revealed a voltage-dependent memory effect, with distinct hysteresis behaviors observed at cycles with voltage sweep ranging from −1V to 1V. Also, for cycles ranging from −4 V to 4V, the MIS structure with the TeO 2 ZnO interlayer exhibited enhanced charge storage and retention capabilities, underscoring its potential as a versatile multibit storage device. Tests with multiple cycles of voltage sweeps demonstrated consistency in the current response, corroborating the relevance and reliability of this memory technology. This memory device emerges as a promising candidate to address the escalating demand for enhanced data storage density and versatility in modern semiconductor memory technologies.“