Silicon Storage Technology and The Regents of the University of California Assigned Patent

Silicon Storage Technology, Inc. San Jose, CA, and The Regents of the University of California, Oakland, CA, has been assigned a patent (12347484) developed by Tran; Hieu Van, San Jose, CA, Do; Nhan, Saratoga, CA, Bayat; Farnood Merrikh, Guo; Xinjie, Strukov; Dmitri, Goleta, CA, Tiwari; Vipin, Dublin, CA, and Reiten; Mark, Alamo, CA, for a “memory device of non-volatile memory cells.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory device includes a non-volatile memory cells, source regions and drain regions arranged in rows and columns. Respective ones of the columns of drain regions include first drain regions and second drain regions that alternate with each other. Respective ones of first lines electrically connect together the source regions in one of the rows of the source regions and are electrically isolated from the source regions in other rows of the source regions. Respective ones of second lines electrically connect together the first drain regions of one of the columns of drain regions and are electrically isolated from the second drain regions of the one column of drain regions. Respective ones of third lines electrically connect together the second drain regions of one of the columns of drain regions and are electrically isolated from the first drain regions of the one column of drain regions.”

The patent application was filed on 2023-04-28 (18/141090).