Qualcomm Assigned Five Patents

Hybrid memory system with increased bandwidth
Qualcomm Inc., San Diego, CA, has been assigned a patent (12340859) developed by Suh; Jungwon, San Diego, CA, for a “hybrid memory system with increased bandwidth.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A hybrid memory system with improved bandwidth is disclosed. In one aspect, a memory system is provided that increases bandwidth relative to the JEDEC low-power double data rate version 5 (LPDDR5) standard. This improvement is made possible by increasing a data conductor count from sixteen to twenty-four. Optionally, the bandwidth may be further improved by increasing a clock frequency from a first value to a second value. This allows the hybrid memory system to provide improved bandwidth without the complications of merely doubling pin counts or doubling clock speed. Further, coding techniques tailored to the pin count and pin layout are provided.”

The patent application was filed on 2024-05-20 (18/668593).

Packed commands for communicating with flash memory system
Qualcomm Inc., San Diego, CA, has been assigned a patent (12333146) developed by Boenapalli; Madhu Yashwanth, Hyderabad, India, Sreeram; Sai Praneeth, Anantapur, India, and Paravada; Surendra, Hyderabad, India, for “packed commands for communicating with flash memory system.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “This disclosure provides systems, methods, and devices for memory systems that support packed commands for improved performance and reduced power consumption. In a first aspect, a method of accessing data in a flash memory system includes a host memory controller receiving a plurality of commands from a storage driver for execution by a flash memory device; packaging, by the memory controller of the host device, the plurality of commands as a packed command in a packet; and transmitting, by the memory controller of the host device to the flash memory device, the packet comprising the packed command for execution by the flash memory device. The use of packed commands may be based on determining the command acknowledgement delay from the flash memory device exceeds a threshold delay. Other aspects and features are also claimed and described.”

The patent application was filed on 2023-03-09 (18/181421).

Memory repair system and method
Qualcomm Inc., San Diego, CA, has been assigned a patent (12300337) developed by Dai; Hong, Borovietzky; Amir, Jain; Arvind, San Diego, CA, Bitam; Massine, Cork, Ireland, and Krishnappa; Madan, San Diego, CA, for “memory repair system and method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A system for repairing a random access memory may include serial test interface logic, fuse-sense logic, a repair data register chain, and multiplexing logic. The repair data register chain may include serially interconnected data registers configured to shift data through the repair data register chain. Each data register of the repair data register chain may have a data output configured to be coupled to a repair information input of the random access memory. The multiplexing logic may be configured to provide a soft-repair mode and a hard-repair mode. When the soft-repair mode is selected, the multiplexing logic may be configured to receive soft-repair data provided by the serial test interface logic into the data registers. When the hard-repair mode is selected, the multiplexing logic may be configured to receive the data provided by the fuse-sense logic into the data registers.”

The patent application was filed on 2022-09-14 (17/944691).

Mechanism to enhance endurance in universal flash storage devices
Qualcomm Inc., San Diego, CA, has been assigned a patent (12265711) developed by Pandey; Ashwini, Muzaffarpur, India, Jha; Pratibind Kumar, and Garg; Manish, Hyderabad, India, for a “mechanism to enhance endurance in universal flash storage devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods that may be performed by a universal flash storage (UFS) device of a computing device for configuring flash memory cells. Various embodiments may include setting a number of degraded triple-level cells (TLCs) attribute, and configuring at least one degraded TLC as at least one single-level cell (SLC) based on the number of degraded TLCs attribute, the at least one degraded TLC being not functional as a TLC and functional as an SLC. Some embodiments may include identifying the at least one degraded TLC based on at least one degradation attribute associated with the at least one degraded TLC, the at least one degradation attribute configured to indicate that the at least one degraded TLC is not functional as a TLC, and identifying an amount of degraded TLCs that are not functional as a TLC.”

The patent application was filed on 2024-01-15 (18/412776).

Universal flash storage read throughput enhancements
Qualcomm Inc., San Diego, CA, has been assigned a patent (12197771) developed by Devineni; Sravani, Hyderabad, India, Sreeram; Sai Praneeth, Anantapur, India, Boenapalli; Madhu Yashwanth, and Paravada; Surendra, Hyderabad, India, for a “universal flash storage read throughput enhancements.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods that may be performed by a universal flash storage (UFS) system of a computing device for updating logical-to-physical (L2P) address mapping tables. Various embodiments may include enabling a device control mode (DCM) of host performance booster (HPB) based on a flush of a writebooster buffer to a normal storage of a UFS device of the UFS system, and updating an L2P address mapping table at a host device of the UFS system while DCM is enabled based on the flush of the writebooster buffer to the normal storage. Some embodiments may include generating a signal having an indicator of a UFS protocol information unit configured to indicate a change in an HPB mode at the UFS device based on the flush of the writebooster buffer to the normal storage, and sending the signal from the UFS device to the host device.”

The patent application was filed on 2023-04-11 (18/298484).