Radian Memory Systems Assigned Patent

Radian Memory Systems, LLC, Plano, TX, has been assigned a patent (12292792) developed by Lercari; Robert, Thousand Oaks, CA, Robertson; Craig, Simi Valley, CA, and Jadon; Mike, Manhattan Beach, CA, for an “erasure coding techniques for flash memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “This disclosure provides a memory controller for asymmetric non-volatile memory, such as flash memory, and related host and memory system architectures. The memory controller is configured to automatically generate and transmit redundancy information to a destination, e.g., a host or another memory drive, to provide for cross-drive redundancy. This redundancy information can be error correction (EC) information, which is linearly combined with similar information from other drives to create “superparity.” If EC information is lost for one drive, it can be rebuilt by retrieving the superparity, retrieving or newly generating EC information for uncompromised drives, and linearly combining these values. In one embodiment, multiple error correction schemes are used, including a first intra-drive scheme to permit recovery of up to x structure-based failures, and the just-described redundancy scheme, to provide enhanced security for greater than x structure-based failures.”

The patent application was filed on 2023-05-19 (18/199456).