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Infineon Technologies Assigned Two Patents

Systems, methods, and devices for secured NVMs, system and method for testing NVM

Systems, methods, and devices for secured NVMs
Infineon Technologies LLC, San Jose, CA, has been assigned a patent (12306954) developed by Krishnegowda; Sandeep, San Jose, CA, and Feng; Zhi, Fremont, CA, for systems, methods, and devices for secured nonvolatile memories.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems, methods, and devices securely boot processors and nonvolatile memories. Methods include implementing, using a controller of a secured nonvolatile memory, a validation operation on a first portion of code stored in a first secured storage region of the secured nonvolatile memory, the validation operation comprising computing a validation value. Methods also include retrieving a second portion of code from a second secured storage region, the second portion of code comprising a pre-computed validation value, the first and second portion of code being associated with booting a processor, and implementing a comparison operation of the validation value and the pre-computed validation value. Methods further include generating, using the controller, a signal based on a result of the comparison operation, the signal being provided to the processor via an interface of the secured nonvolatile memory, and the signal enabling booting of the processor in response to a matching comparison operation.

The patent application was filed on 2024-03-06 (18/597627).

System and method for testing NVM
Infineon Technologies LLC, San Jose, CA, has been assigned a patent (12300342) developed by Georgescu; Bogdan, Zonte; Cristinel, Colorado Springs, CO, and Raghavan; Vijay, Driftwood, CO, for system and method for testing a non-volatile memory.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “In accordance with an embodiment, a method for characterizing a non-volatile memory, includes: applying a first voltage on a word line conductively coupled to a non-volatile memory cell and measuring a current flowing through the non-volatile memory cell in response to applying the first voltage. Measuring the current includes: using a sense amplifier, comparing the current flowing through the non-volatile memory cell with a plurality of different first currents generated by an adjustable current source while applying the same first voltage on the word line, and determining the measured current based on the comparing.

The patent application was filed on 2022-12-21 (18/069408).

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