R&D: Multibit Content Addressable Memory (CAM) Design and Optimization Based on 3D NAND Compatible Indium–Gallium–Zinc–Oxide (IZGO) Flash

IEEE Transactions on Very Large Scale Integration (VLSI) Systems has published an article written by Chao Li; College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China, Chen Sun; Department of Electrical and Computer Engineering, National University of Singapore, Singapore, Singapore, Jianyi Yang; College of Integrated Circuits, Zhejiang University, Hangzhou, China, Kai Ni; Electrical Engineering Department, University of Notre Dame, IN, USA, Xiao Gong; Department of Electrical and Computer Engineering, National University of Singapore, Singapore, Singapore, Cheng Zhuo; College of Integrated Circuits, Zhejiang University, Hangzhou, China, and Key Laboratory of CS and AUS of Zhejiang Province, Hangzhou, China, and Xunzhao Yin; College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China, and Key Laboratory of CS and AUS of Zhejiang Province, Hangzhou, China.

Abstract: “Content addressable memory (CAM) has been employed in various data-intensive tasks for its parallel pattern-matching capability. To enhance the density and efficiency of CAMs, emerging nonvolatile memory (NVM) technologies have been exploited in the CAM designs. Recently, the multilevel cell (MLC) characteristics of NVMs have been utilized in several analog and multibit CAM designs, achieving higher density than conventional binary/ternary CAM designs. However, these analog and multibit CAM designs are built with the practical experience of circuit designers, lacking a general analog/multibit design methodology. In this article, we propose a general and effective design and optimization scheme for multibit CAM, using a novel 3-D nand-compatible amorphous indium–gallium–zinc–oxide (IGZO) flash as a proxy of three-terminal NVM devices. The proposed scheme encodes the multibit data into the flash devices, enabling the 3-D nand flash array to operate as an ultradense nand or nor CAM without significant structural change. For further performance optimization, we propose a design space exploration scheme for optimal CAM parameters. Evaluation results suggest that the CAM design based on our proposed design and optimization scheme achieves over 35 × area per bit saving compared with the representative ferroelectric field effect transistor (FeFET)-based multibit CAM, and a 38.1 × energy-delay-area product (EDAP) improvement over the state-of-the-art analog CAM, respectively.“