R&D: SiGe/Si Heterojunction Drain Transistor for Faster 3D NAND Flash Memory Erase

IEEE Xplore has published, in 2024 IEEE International Memory Workshop (IMW) proceedings, an article written by Dasom Lee, and Tsu-Jae King Liu, Electrical Engineering and Computer Sciences Department, University of California, Berkeley, Berkeley, California, USA.

Abstract: “Some 3D NAND flash memory technologies utilize the phenomenon of Gate Induced Drain Leakage (GIDL) for erase operation. As the number of memory cells stacked in a 3D NAND string increases, larger GIDL current is needed to maintain the same erase speed. In this work, the use of silicon-germanium (SiGe), which has a smaller band-gap energy compared to silicon (Si), is proposed to augment GIDL current through enhanced band-to-band tunneling. TCAD simulation confirms that, when the heavily doped drain and a portion of the undoped channel region of the drain transistor comprise SiGe, both GIDL current and erase speed are enhanced significantly, while maintaining the same off-state current in inhibit mode operation.“