Sony Semiconductor Solutions Assigned Patent
NVM cell, cell array, and information writing method of NVM cell array
By Francis Pelletier | July 1, 2024 at 2:00 pmSony Semiconductor Solutions Corporation, Kanagawa, Japan, has been assigned a patent (11996130) developed by Yokoyama; Takashi, Oka; Mikio, and Kanda; Yasuo, Kanagawa, Japan, for “nonvolatile memory cell, nonvolatile memory cell array, and information writing method of nonvolatile memory cell array.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A nonvolatile memory cell includes a resistance-change nonvolatile memory element 50 and a selection transistor TR. One end of the nonvolatile memory element 50 is connected to one source/drain region 15A of the selection transistor TR and is connected to a write line WR. The other source/drain region 15B of the selection transistor TR is connected to a select line SL. The other end of the nonvolatile memory element 50 is connected to a bit line BL..”
The patent application was filed on 2020-06-11 (17/627839).