STMicroelectronics Assigned Patent
NVM device with vertical state transistor and vertical selection transistor
By Francis Pelletier | May 6, 2024 at 2:00 pmSTMicroelectronics (Rousset) SAS, Rousset, France, has been assigned a patent (11943931) developed by Hubert, Quentin, Marseilles, France, Marzaki, Abderrezak, Aix en Provence, France, and Delalleau, Julien, Marseilles, France, for “non-volatile memory device with vertical state transistor and vertical selection transistor.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “In one embodiment, a non-volatile memory device includes a vertical state transistor disposed in a semiconductor substrate, where the vertical state transistor is configured to trap charges in a dielectric interface between a semiconductor well and a control gate. A vertical selection transistor is disposed in the semiconductor substrate. The vertical selection transistor is disposed under the state transistor, and configured to select the state transistor.”
The patent application was filed on 2021-04-01 (17/220286).