R&D: 13.7 A 1Tb Density 3b/Cell 3D-NAND Flash on 2YY-Tier Technology with 300MB/s Write Throughput

IEEE Xplore has published, in 2024 IEEE International Solid-State Circuits Conference (ISSCC) proceedings,an article written by Koichi Kawai; Yuichi Einaga; Yoko Oikawa; Micron Technology, Tokyo, Japan, Yankang He; Micron Technology, San Jose, CA, Biagio Iorio; Micron Technology, Avezzano, Italy, Shigekazu Yamada; Yoshihiko Kamata; Micron Technology, Tokyo, Japan, Tomoko Iwasaki; Micron Technology, San Jose, CA, Andrea D’Alessandro; Micron Technology, Avezzano, Italy, Erwin Yu; Micron Technology, San Jose, CA, Arvind Muralidharan; Micron Technology, Folsom, CA, Qinge Li; Henry Nguyen; Kim-Fung Chan; Michele Piccardi; Micron Technology, San Jose, CA, Takaaki Ichikawa; Micron Technology, Tokyo, Japan, Jeff Yu; Guan Wang; Kwangwon Kim; Chulbum Kim; Micron Technology, San Jose, CA, Paolo Mangalindan; Micron Technology, Folsom, CA, Hojung Yun; Micron Technology, San Jose, CA, Luca Nubile; Micron Technology, Avezzano, Italy, Kapil Verma; Sushanth Bhushan; Dheeraj Srinivasan; Micron Technology, San Jose, CA, Hidehiko Kuge; Micron Technology, Tokyo, Japan, Rajesh Subramanian; Micron Technology, Hyderabad, India, Jiro Kishimoto; Toru Kamijo; Micron Technology, Tokyo, Japan, Padma Musunuri; Chang Siau; and Ramin Ghodsi; Micron Technology, San Jose, CA.

Abstract: “With the recent evolution of AI, our digital world, constructed by networks, is advancing rapidly and driving demand for data bandwidth and transfer speed everywhere from mobiles to data centers, regardless of form factor. This paper presents a 1Tb 3b/cell 3DNAND Flash on 2YY Tiers with a 6-plane and 3.6GT/s data-transfer features designed for a variety of applications that require high bandwidth.“