Korea Advanced Institute of Science and Technology Researchers Developed Low Power Memory for Neuromorphic Computing​

From KAIST (Korea Advanced Institute of Science and Technology)

A team of Korean researchers is making headlines by developing a new memory device that can be used to replace existing memory or used in implementing neuromorphic computing for next-gen AI hardware for its low processing costs and its ultra-low power consumption.

Kwang-Hyung Lee, president, KAIST announced on April 4 that professor Shinhyun Choi’s research team, school of electrical engineering, has developed a next-gen phase change memory ^(*) device featuring low-power consumption that can replace DRAM and NAND flash memory.

Existing phase change memory has the problems such as expensive fabrication process for making highly scaled device and requiring substantial amount of power for operation. To solve these problems, Choi’s research team developed a low power phase change memory device by electrically forming a very small nanometer (nm) scale phase changeable filament without expensive fabrication processes. This new development has the advantage of having a very low processing cost and also of enabling operating with low power consumption.

DRAM, one of the most popularly used memory, is very fast, but has volatile characteristics in which data disappears when the power is turned off. NAND flash memory, a storage device, has relatively slow read/write speeds, but it has non-volatile characteristic that enables it to preserve the data even when the power is cut off.

Phase change memory, on the other hand, combines the advantages of both DRAM and NAND flash memory, offering high speed and non-volatile characteristics. For this reason, it is being highlighted as the next-gen memory that can replace existing memory, and is being actively researched as a memory technology or neuromorphic computing technology that mimics the human brain.

However, conventional phase change memory devices require a substantial amount of power to operate, making it difficult to make practical large-capacity memory products or realize a neuromorphic computing system. In order to maximize the thermal efficiency for memory device operation, previous research efforts focused on reducing the power consumption by shrinking the physical size of the device through the use of the lithography technologies, but they were met with limitations in terms of practicality as the degree of improvement in power consumption was minimal whereas the cost and the difficulty of fabrication increased with each improvement.

In order to solve the power consumption problem of phase change memory, Choi’s research team created a method to electrically form phase change materials in extremely small area, successfully implementing a low-power phase change memory device that consumes 15x less power than a conventional phase change memory device fabricated with the expensive lithography tool.

Figure 1. Illustrations of the ultra-low power phase change memory device developed through this study and the comparison of power consumption by the newly developed phase change memory device compared to conventional phase change memory devices.

Choi expressed strong confidence in how this research will span out in the future in the new field of research saying: “The phase change memory device we have developed is significant as it offers a novel approach to solve the lingering problems in producing a memory device at a greatly improved manufacturing cost and energy efficiency. We expect the results of our study to become the foundation of future electronic engineering, enabling various applications including high-density 3D vertical memory and neuromorphic computing systems as it opened up the possibilities to choose from a variety of materials. I would like to thank the National Research Foundation of Korea and the National NanoFab Center for supporting this research.”

This study, in which See-On Park, student of MS-PhD integrated program, and Seokman Hong, a doctoral student, school of electrical engineering, KAIST, participated as 1st authors, was published on April 4 in the April issue of the international academic journal Nature. (Paper title: Phase-Change Memory via a Phase-Changeable Self-Confined Nano-Filament, see below)

This research was conducted with support from the Next-Generation Intelligent Semiconductor Technology Development Project, PIM AI Semiconductor Core Technology Development (Device) Project, Excellent Emerging Research Program of the National Research Foundation of Korea, and the Semiconductor Process-based Nanomedical Devices Development Project of the National NanoFab Center.

^(*) Phase change memory: A memory device that stores and/or processes information by changing the crystalline states of materials to be amorphous or crystalline using heat, thereby changing its resistance state.

Article: Phase-change memory via a phase-changeable self-confined nano-filament

Nature has published an article written by See-On Park, Seokman Hong, Su-Jin Sung, Dawon Kim, Seokho Seo, Hakcheon Jeong, Taehoon Park, The School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea , Won Joon Cho, Device Research Center, Samsung Advanced Institute of Technology (SAIT), Samsung Electronics Co., Ltd., Suwon, Republic of Korea , Jeehwan Kim, Device Research Center, Samsung Advanced Institute of Technology (SAIT), Samsung Electronics Co., Ltd., Suwon, Republic of Korea, Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA, USA, and Department of Mechanical Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA, and Shinhyun Choi, The School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea.

Abstract: “Phase-change memory (PCM) has been considered a promising candidate for solving von Neumann bottlenecks owing to its low latency, non-volatile memory property and high integration density^1,2. However, PCMs usually require a large current for the reset process by melting the phase-change material into an amorphous phase, which deteriorates the energy efficiency^2,3,4,5. Various studies have been conducted to reduce the operation current by minimizing the device dimensions, but this increases the fabrication cost while the reduction of the reset current is limited^6,7. Here we show a device for reducing the reset current of a PCM by forming a phase-changeable SiTe_x nano-filament. Without sacrificing the fabrication cost, the developed nano-filament PCM achieves an ultra-low reset current (approximately 10 μA), which is about one to two orders of magnitude smaller than that of highly scaled conventional PCMs. The device maintains favourable memory characteristics such as a large on/off ratio, fast speed, small variations and multilevel memory properties. Our finding is an important step towards developing novel computing paradigms for neuromorphic computing systems, edge processors, in-memory computing systems and even for conventional memory applications.“