R&D: Ferroelectric Transistors Based on Shear-Transformation-Mediated Rhombohedral-Stacked Molybdenum Disulfide
2D semiconductors, such as molybdenum disulfide, equipped with sliding ferroelectricity could provide an answer.
This is a Press Release edited by StorageNewsletter.com on March 6, 2024 at 3:00 pmNature Electronics has published an article written by Tilo H. Yang, Present address: Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA, and Department of Physics, National Taiwan Normal University, Taipei, Taiwan, Bor-Wei Liang, Department of Physics, National Taiwan Normal University, Taipei, Taiwan, and Taiwan Semiconductor Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan, Hsiang-Chi Hu, Department of Physics, National Taiwan Normal University, Taipei, Taiwan, Fu-Xiang Chen, Department of Electrophysics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan, Sheng-Zhu Ho, Department of Physics, National Cheng Kung University, Tainan, Taiwan, Wen-Hao Chang, Department of Physics, National Taiwan Normal University, Taipei, Taiwan, Liu Yang, School of Physics, Huazhong University of Science and Technology, Wuhan, P. R. China, Han-Chieh Lo, Tzu-Hao Kuo, Department of Physics, National Taiwan Normal University, Taipei, Taiwan, Jyun-Hong Chen, Taiwan Semiconductor Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan, Po-Yen Lin, Institute of Cellular and Organismic Biology, Academia Sinica, Taipei, Taiwan, Kristan Bryan Simbulan, Department of Mathematics and Physics, University of Santo Tomas, Manila, Philippines, Zhao-Feng Luo, Program for Semiconductor Devices, Materials, and Hetero-integration, Graduate School of Advanced Technology, National Taiwan University, Taipei, Taiwan , Alice Chinghsuan Chang, Center for Measurement Standards, Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan, Yi-Hao Kuo, Department of Electrophysics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan, Yu-Seng Ku, Yi-Cheng Chen, You-Jia Huang, Yu-Chen Chang, Yu-Fan Chiang, Department of Physics, National Taiwan Normal University, Taipei, Taiwan, Ting-Hua Lu, Department of Physics, National Taiwan Normal University, Taipei, Taiwan, Min-Hung Lee, Program for Semiconductor Devices, Materials, and Hetero-integration, Graduate School of Advanced Technology, National Taiwan University, Taipei, Taiwan, Kai-Shin Li, Taiwan Semiconductor Research Institute, National Applied Research Laboratories, Hsinchu, Taiwan, Menghao Wu, School of Physics, Huazhong University of Science and Technology, Wuhan, P. R. China, Yi-Chun Chen, Department of Physics, National Cheng Kung University, Tainan, Taiwan, Chun-Liang Lin, Department of Electrophysics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan, and Yann-Wen Lan, Department of Physics, National Taiwan Normal University, Taipei, Taiwan.
Abstract: “To develop low-power, non-volatile computing-in-memory device using ferroelectric transistor technologies, ferroelectric channel materials with scaled thicknesses are required. Two-dimensional semiconductors, such as molybdenum disulfide (MoS2), equipped with sliding ferroelectricity could provide an answer. However, achieving switchable electric polarization in epitaxial MoS2 remains challenging due to the absence of mobile domain boundaries. Here we show that polarity-switchable epitaxial rhombohedral-stacked (3R) MoS2 can be used as a ferroelectric channel in ferroelectric memory transistors. We show that a shear transformation can spontaneously occur in 3R MoS2 epilayers, producing heterostructures with stable ferroelectric domains embedded in a highly dislocated and unstable non-ferroelectric matrix. This diffusionless phase transformation process produces mobile screw dislocations that enable collective polarity control of 3R MoS2 via an electric field. Polarization–electric-field measurements reveal a switching field of 0.036 V nm−1 for shear-transformed 3R MoS2. Our sliding ferroelectric transistors are non-volatile memory units with thicknesses of only two atomic layers and exhibit an average memory window of 7 V with an applied voltage of 10 V, retention times greater than 104 seconds and endurance greater than 104 cycles.“