R&D: Critical Data Backup (CDB) with Hybrid Flash-Based Consumer Devices

ACM Transactions on Architecture and Code Optimization has published an article written by Longfei Luo, Dingcui Yu, Software/Hardware Co-design Engineering Research Center, Ministry of Education, and School of Computer Science and Technology, East China Normal University, China, Yina Lv, Department of Computer Science, City University of Hong Kong, China, and Liang Shi, Software/Hardware Co-design Engineering Research Center, Ministry of Education, and School of Computer Science and Technology, East China Normal University, China.

Abstract: “Hybrid flash-based storage constructed with high-density and low-cost flash memory has become increasingly popular in consumer devices in the last decade due to its low cost. However, its poor reliability is one of the major concerns. To protect critical data for guaranteeing user experience, some methods are proposed to improve the reliability of consumer devices with non-hybrid flash storage. However, with the widespread use of hybrid storage, these methods will result in severe problems, including significant performance and endurance degradation. This is caused by that the different characteristics of flash memory in hybrid storage are not considered, e.g., performance, endurance, and access granularity. To address the above problems, a critical data backup (CDB) design is proposed to ensure critical data reliability at a low cost. The basic idea is to accumulate two copies of critical data in the fast memory first to make full use of its performance and endurance. Then one copy will be migrated to the slow memory in the stripe to avoid the write amplification caused by different access granularity between them. By respecting the different characteristics of flash memory in hybrid storage, CDB can achieve encouraging performance and endurance improvement compared with the state-of-the-art. Furthermore, to avoid performance and lifetime degradation caused by the backup data occupying too much space of fast memory, CDB Pro is designed. Two advanced schemes are integrated. One is making use of the pseudo-single-level-cell (pSLC) technique to make a part of slow memory become high-performance. By supplying some high-performance space, data will be fully updated before being evicted to slow memory. More invalid data are generated which reduces eviction costs. Another is to categorize data into three types according to their different life cycles. By putting the same type of data in a block, the eviction efficiency is improved. Therefore, both of them can improve device performance and lifetime based on CDB. Experiments are conducted to prove the efficiency of CDB and CDB Pro. Experimental results show that compared with the state-of-the-arts, CDB can ensure critical data reliability with lower device performance and lifetime loss while CDB Pro can diminish the loss further.“