Kioxia Assigned Eighteen Patents
On NVM, SSD, memory, controller, storage systems and technologies
By Francis Pelletier | December 5, 2023 at 2:00 pmClock and data recovery device, memory system, and data recovery method
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11728963) developed by Kobayashi, Hiroyuki, Yokohama Kanagawa, Japan, for “clock and data recovery device, memory system, and data recovery method.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A clock and data recovery device of a memory system receives a multiplexed data signal obtained by multiplexing a plurality of data units, each of which is to be transmitted to one of a plurality of memories for storage therein, in an area corresponding to each memory in an amplitude direction and a time direction. The clock and data recovery device includes a clock generation circuit configured to generate a clock, and a data recovery circuit configured to execute phase synchronization with respect to a synchronization signal included in the multiplexed data signal using the generated clock and to recover one of the data units from the area corresponding to one of the memories, from the multiplexed data signal.”
The patent application was filed on 2021-07-22 (17/382935).
Storing data using Ethernet drives and Ethernet open-channel drives
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11726948) developed by Klein, Yaron, Raanana, Israel, for “system and method for storing data using Ethernet drives and Ethernet open-channel drives.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A system for reading stored data may include one or more Ethernet drives and a controller, both configured to communicatively connect to a host device. The controller may receive a first read command from the host device, determine a first drive among the one or more Ethernet drives using the first read command and a mapping table, translate the first read command into a second read command, and send the second read command to the first drive. Responsive to receiving the second read command, the first drive may send a first remote data transfer instruction to the host device independent of the controller. The first remote data transfer instruction may include stored data read from the first drive to cause the host device to write the stored data read from the first drive to one or more memory buffers in the host device indicated by the second read command.”
The patent application was filed on 2021-11-29 (17/537126).
Buffer optimization for SSDs
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11726704) developed by Horspool, Nigel, Great Missenden, Great Britain, and Margetts, Julien, Thame, Great Britain, for a “buffer optimization for solid-state drives.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A solid-state drive having an integrated circuit comprising a controller that is configured to determine, for data transferred between a host interface of the integrated circuit and nonvolatile semiconductor storage device interface of the integrated circuit, the availability of an internal buffer of the integrated circuit to transparently accumulate the transferred data, and (i) if the internal buffer is available, accumulate the data from target nonvolatile semiconductor storage devices or the host in the internal buffer, or (ii) if the internal buffer is not available, accumulate the data unit from the target nonvolatile semiconductor storage devices or the host in an external buffer communicatively coupled to the controller, wherein the external buffer is external to the integrated circuit. The controller then provides the accumulated data to the respective interfaces to furnish a read or write request from the host.”
The patent application was filed on 2020-03-31 (16/836112).
Memory system with write modes based on internal state of memory controller
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11726712) developed by Saito, Yoshiki, Kawasaki, Japan, for a “memory system with write modes based on an internal state of a memory controller.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, a memory system includes a non-volatile memory and a controller. The non-volatile memory includes first and second memory areas. The controller is configured to, when receiving a write command from the host, determine a write method. The controller is configured to, when a first method is determined, write the data to the first memory area. The controller is configured to, when a second method is determined, write the data to the second memory area. The first method is a write method of writing the data to a physical address associated with the logical address designated in the write command. The second method is a write method of writing the data to a physical address designated by the controller.”
The patent application was filed on 2021-06-10 (17/344230).
NVM device
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11727975) developed by Hoya, Katsuhiko, Yokohama Kanagawa, Japan, for a “nonvolatile memory device.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A nonvolatile memory device of an embodiment includes: a first wiring line extending in a first direction, a second wiring line extending in a second direction intersecting the first direction, a memory cell disposed between the first layer and the second layer, and has first and second terminals, the memory cell including a variable resistance element, a first drive circuit capable of supplying a first potential and a second potential lower than the first potential, a second drive circuit supplying a third potential having a different polarity from a polarity of the first potential, a third drive circuit capable of supplying the second potential and a fourth potential higher than the second potential, a fourth drive circuit supplying a fifth potential having a different polarity from a polarity of the first potential, and a control circuit electrically connected to the first to fourth drive circuits.”
The patent application was filed on 2021-09-15 (17/475822).
Storage device, electronic system including storage device, and control program for storage device
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11720624) developed by Shiozawa, Tatsuo, Setagaya Tokyo, Japan, for “storage device, electronic system including storage device, and control program for storage device.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “In one embodiment, a storage device that is installable in an electronic apparatus includes a first communication interface for connecting the electronic apparatus to the storage device, a nonvolatile memory for storing data and data management table storing a data size and address information for the data stored in the nonvolatile memory, and a processor configured to change at least one piece of data stored in the nonvolatile memory without changing file management information stored in the data management table. The processor is configured to change the stored data without receiving an instruction to do so from the electronic apparatus through the first interface.”
The patent application was filed on 2018-08-24 (16/111866).
Storage controller, device, and program
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11714569) developed by Yamazaki, Hajime, Kawasaki Kanagawa, Japan, for “storage controller, storage device, and program.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, a storage controller is configured to control a storage device capable of, upon issuance of a predetermined command, causing a storage including a temperature sensor to perform a temperature measurement to update a temperature measurement value. The storage controller includes a timer configured to notify a timeout when an elapsed time from a last issuance of the predetermined command reaches a predetermined time, and a controller configured to, when the timeout is notified, issue to the storage a command for updating the temperature measurement value.”
The patent application was filed on 2020-02-27 (16/803324).
Memory system executing loading of software at startup and control method
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11714656) developed by Takanashi, Yoshihiro, Kamakura, Japan, for “memory system executing loading of software at startup and control method.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, a memory system includes a nonvolatile memory, and a controller. The controller controls the nonvolatile memory. The nonvolatile memory includes a first area where specific software is capable of being stored, and a second area where the specific software is stored. The second area has higher reliability than the first area. The controller causes the specific software to be stored in the first area when receiving a command specifying the specific software, and executes loading of the specific software stored in the first area at startup of the controller.”
The patent application was filed on 2020-09-08 (17/014807).
Memory system and method for controlling NVM
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11709597) developed by Yoshida, Hideki, Yokohama Kanagawa, Japan, and Kanno, Shinichi, Tokyo, Japan, for “memory system and method for controlling nonvolatile memory.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.”
The patent application was filed on 2021-07-19 (17/379607).
NVM system, controller for NVM system, and wear leveling method for NVM systems
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11709630) developed by Kaneko, Akiyuki, Yokohama Kanagawa, Japan, for “non-volatile memory system, controller for non-volatile memory system, and wear leveling method for non-volatile memory systems.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory system includes a nonvolatile memory and a controller. The nonvolatile memory has first regions in which data writes and data reads can be executed in parallel. Each of the first regions has second regions which are each a data write/read unit. The controller acquires first values indicating a data write load for each of the first regions, detects a first region having a first value greater than or equal to a first threshold, acquires second values indicating a data write load for each of the plurality of second regions in the detected first region, detects a second region having a second value greater than or equal to a second threshold but less than or equal to a third threshold that is higher than the second threshold, and then move data from the detected second region to a second region in another first region.”
The patent application was filed on 2021-08-27 (17/459956).
Memory system, host device and information processing system for error correction processing
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11704019) developed by Kanno, Shinichi, Tokyo, Japan, Nishimura, Hiroshi, Hachioji Tokyo, Japan, Yoshida, Hideki, and Murayama, Hiroshi, Yokohama Kanagawa, Japan, for “memory system, host device and information processing system for error correction processing.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, a memory system includes a nonvolatile memory and a controller which controls the nonvolatile memory. The controller notifies to an outside an extensive signal which indicates a predetermined state of the nonvolatile memory or the controller.”
The patent application was filed on 2020-10-23 (17/078547).
Independent set data lanes for IOD SSD
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11704056) developed by Jain, Amit Rajesh, Cupertino, CA, for an “independent set data lanes for IOD SSD.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Various implementations described herein relate to systems and methods for enabling a data lane for communicating messages for each of a plurality of regions of a non-volatile memory. Each of the plurality of regions includes a plurality of dies. The messages for each of the plurality of regions are communicated via the data lane.”
The patent application was filed on 2019-07-26 (16/523925).
Memory system and storage device
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11704235) developed by Ochiai, Shogo, Kamakura, Japan, and Tojo, Nobuaki, Yokohama, Japan, for “memory system and storage device.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory system of an embodiment includes a nonvolatile memory, a primary cache memory, a secondary cache memory, and a processor. The processor performs address conversion by using logical-to-physical address conversion information relating to data to be addressed in the nonvolatile memory. Based on whether first processing is performed on the nonvolatile memory or second processing is performed on the nonvolatile memory, the processor controls to store whether the logical-to-physical address conversion information relating to the first processing to be in the primary cache memory as cache data or logical-to-physical address conversion information relating to the second processing to be in the secondary cache memory as cache data.”
The patent application was filed on 2021-06-01 (17/335512).
Fairshare between multiple SSD submission queues
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11698753) developed by Horspool, Nigel, and Clarke, Brian, Abingdon, Great Britain, for a “fairshare between multiple SSD submission queues.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method performed by a controller of an SSD, the controller coupled to a non-volatile semiconductor memory device and comprising a first command queue (Q1) and a second command queue (Q2). The method comprises selecting from a submission queue at least one command from a host, the command relating to an action to be performed on the memory device. The method comprises determining if a number of in-flight commands received from the host via the submission queue and already present in Q1 exceeds a threshold. The method comprises adding the selected command to Q2 if the threshold is exceeded, otherwise adding the selected command to Q1. The method comprises processing a first command from Q1 and a second command from Q2 to perform a first action and a second action, respectively, on the memory device, the first action being completed in advance of the second action.”
The patent application was filed on 2021-02-17 (17/177657).
Memory system and method for controlling NVM
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11693770) developed by Kanno, Shinichi, Tokyo, Japan, and Esaka, Naoki, Kawasaki Kanagawa, Japan, for “memory system and method for controlling nonvolatile memory.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, a memory system manages a plurality of management tables corresponding to a plurality of first blocks in a nonvolatile memory. Each management table includes a plurality of reference counts corresponding to a plurality of data in a corresponding first block. The memory system copies a set of data included in a copy-source block for garbage collection and corresponding respectively to reference counts belonging to a first reference count range to a first copy-destination block, and copies a set of data included in the copy-source block and corresponding respectively to reference counts belonging to a second reference count range having a lower limit higher than an upper limit of the first reference count range to a second copy-destination block.”
The patent application was filed on 2021-09-01 (17/464480).
Workload-adaptive overprovisioning in solid state storage drive arrays
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11693568) developed by Dedrick, Joel H., Irvine, CA, for a “workload-adaptive overprovisioning in solid state storage drive arrays.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method for managing overprovisioning in a solid state storage drive (SSD) array comprising (i) receiving usage data from each of a plurality of SSDs, (ii) determining a predicted service life value for each of the plurality of SSDs based on at least the usage data, (iii) comparing each of the predicted service life values with a predetermined service life value for each respective SSD, (iv) remapping at least one namespace in at least one of the plurality of SSDs among the plurality of SSDs, or reducing an available logical storage capacity for at least one of the plurality of SSDs. Here the remapping or reducing is based on a result of the comparing that the predicted service life value for the at least one of the plurality of SSDs is not greater than the predetermined service life value for that SSD.”
The patent application was filed on 2021-09-20 (17/479579).
Nonvolatile semiconductor memory device
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11693734) developed by Yoshii, Kenichiro, and Kanno, Shinichi, Tokyo, Japan, for a “nonvolatile semiconductor memory device.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, a nonvolatile semiconductor memory device is connectable to a controller. The nonvolatile semiconductor memory device includes a cell array and a control circuit. The cell array includes a plurality of blocks. The control circuit executes program operations for a plurality of pages included in a write destination block of the blocks, in a certain program order. The write destination block is selected by the controller from the blocks. The control circuit is configured to notify a page address corresponding to a next program operation with respect to the write destination block to the controller.”
The patent application was filed on 2021-10-05 (17/449994).
Soft error detection and correction for data storage devices
Kioxia Corporation, Tokyo, Japan, has been assigned a patent (11693733) developed by Kanter, Ofir, Haifa, Israel, Steiner, Avi, Kiriat Motzkin, Israel, and Kurosawa, Yasuhiko, Fujisawa, Japan, for “soft error detection and correction for data storage devices.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Various implementations described herein relate to systems and methods for detecting soft errors, including but not limited to, errors introduced after reading a codeword from a non-volatile memory, and before providing data to a host. Embodiments can include decoding the codeword from the non-volatile memory to obtain at least input data, and determining validity of the input data using a first signature after processing the input data through a data path. If it is determined that the input data is valid using the first signature, the input data is sent to a host.”
The patent application was filed on 2021-01-21 (17/154661).