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United Microelectronics Assigned Seven Patents

On NVM and memory technologies

Memory array having strap region with staggered dummy magnetic storage elements
United Microelectronics Corp., Hsinchu, Taiwan, has been assigned a patent (1173728) developed by Hsu, Po-Kai, Tainan, Taiwan, Wang, Hui-Lin, Taipei, Taiwan, Chou, Kun-I, Tainan, Taiwan, Hsu, Ching-Hua, Kaohsiung, Taiwan, Fan, Ju-Chun, Tainan, Taiwan, Lin, Yi-Yu, Taichung, Taiwan, and Chen, Hung-Yueh, Hsinchu, Taiwan, for distributed storage system data management and security.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A memory array includes at least one strap region having therein a plurality of source line straps and a plurality of word line straps, and at least two sub-arrays having a plurality of staggered, active magnetic storage elements. The at least two sub-arrays are separated by the strap region. A plurality of staggered, dummy magnetic storage elements is disposed within the strap region.

The patent application was filed on 2021-03-15 (17/202296).

Memory device and manufacturing method
United Microelectronics Corp., Hsinchu, Taiwan, has been assigned a patent (11707003) developed by Chang, Chich-Neng, Pingtung County, Taiwan, Lin, Da-Jun, Kaohsiung, Taiwan, Su, Shih-Wei, Tsai, Fu-Yu, Tainan, Taiwan, and Tsai, Bin-Siang, Changhua County, Taiwan, for memory device and manufacturing method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A memory device and a manufacturing method thereof are provided. The memory device includes a device substrate, a resistance variable layer and a top electrode. The bottom electrode is disposed on the device substrate. The resistance variable layer is disposed on the bottom electrode. The top electrode is disposed on the resistance variable layer. The bottom electrode is formed with a tensile stress, while the top electrode is formed with a compressive stress.

The patent application was filed on 2021-01-04 (17/140981).

Semiconductor memory device and fabrication method
United Microelectronics Corp., Hsinchu, Taiwan, has been assigned a patent (11706933) developed by Hsu, Wen-Hsin, Chiayi, Taiwan, Chen, Ko-Chi, Taoyuan, Taiwan, Chang, Tzu-Yun, Hsinchu County, Taiwan, and Chen, Chung-Tse, Hsinchu, Taiwan, for semiconductor memory device and fabrication method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A semiconductor memory device includes a substrate, a dielectric layer on the substrate, and a contact plug in the dielectric layer. An upper portion of the contact plug protrudes from a top surface of the dielectric layer. The upper portion of the contact plug acts as a first electrode. A buffer layer is disposed on the dielectric layer and beside the upper portion of the contact plug. A resistive-switching layer is disposed beside the buffer layer. A second electrode is disposed beside the resistive-switching layer.

The patent application was filed on 2021-04-07 (17/224140).

Semiconductor memory device and fabrication method
United Microelectronics Corp., Hsinchu, Taiwan, has been assigned a patent (11699730) developed by Yi, Liang, Li, Zhiguo, Gao, Xiaojuan, and Ren, Chi, Singapore, Singapore, for semiconductor memory device and fabrication method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A semiconductor memory device includes a substrate, a source diffusion region in the substrate, a pair of floating gates disposed on opposite of the source diffusion region, a first dielectric cap layer disposed directly on each of the floating gates, an erase gate disposed on the source diffusion region and partially overlapping an upper inner corner of each of the floating gates, a second dielectric cap layer disposed on the erase gate and the first dielectric cap layer, a select gate disposed on a sidewall of the first dielectric cap layer, and a drain diffusion region disposed in the substrate and adjacent to the select gate.

The patent application was filed on 2021-10-25 (17/510371).

NVM device and manufacturing method
United Microelectronics Corp., Hsinchu, Taiwan, has been assigned a patent (11690230) developed by Lin, Cheng-Yi, Yilan County, Taiwan, Weng, Tang Chun, Chiayi, Taiwan, Hsu, Chia-Chang, Chen, Yung Shen, Kaohsiung, Taiwan, and Lin, Chia-Hung, Tainan, Taiwan, for non-volatile memory device and manufacturing method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: Provided are a non-volatile memory device and a manufacturing method thereof. The non-volatile memory device includes a substrate having a memory region and a dummy region surrounding the memory region, an interconnect structure, memory cells, conductive vias and dummy vias. The interconnect structure is disposed on the substrate and in the memory region. The memory cells are disposed on the interconnect structure and arranged in an array when viewed from a top view. The memory cells include first memory cells in the memory region and second memory cells in the dummy region. The conductive vias are disposed in the memory region and between the first memory cells and the interconnection structure to electrically connect each of the first memory cells to the interconnect structure. The dummy vias are disposed in the dummy region and surround the memory region.

The patent application was filed on 2021-06-11 (17/345806).

Resistive random access memory structure and fabricating
United Microelectronics Corp., Hsinchu, Taiwan, has been assigned a patent (11665913) developed by Lin, Yi-Yu, Taichung, Taiwan, Hsu, Po-Kai, and Chiu, Chung-Yi, Tainan, Taiwan, for resistive random access memory structure and fabricating method of the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A resistive random access memory (RRAM) structure includes a substrate. A transistor is disposed on the substrate. The transistor includes a gate structure, a source and a drain. A drain contact plug contacts the drain. A metal interlayer dielectric layer is disposed on the drain contact plug. An RRAM is disposed on the drain and within a first trench in the metal interlayer dielectric layer. The RRAM includes the drain contact plug, a metal oxide layer and a top electrode. The drain contact plug serves as a bottom electrode of the RRAM. The metal oxide layer contacts the drain contact plug. The top electrode contacts the metal oxide layer and a metal layer is disposed within the first trench.

The patent application was filed on 2021-12-02 (17/541226).

NVM device and method for fabricating
United Microelectronics Corp., Hsinchu, Taiwan, has been assigned a patent (11637188) developed by Yeh, Yu-Jen, Taichung, Taiwan, and Chen, Chih-Jung, Hsinchu County, Taiwan, for non-volatile memory device and method for fabricating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: An NVM device includes a semiconductor substrate, a first floating gate, a first control gate, a first drain region, and a common source region. The semiconductor substrate has a recess extending downward from the substrate surface. The first floating gate is disposed in the recess, has a base and a side wall connecting to the base. The first control gate is disposed on and adjacent to the first floating gate. The first drain region is disposed in the semiconductor substrate in the recess. The common source region is formed in the semiconductor substrate in the recess, is adjacent to the first floating gate, and includes a main body and an extension part. The main body is disposed below a bottom surface of the recess and adjacent to the base. The extension part extends upward from the bottom surface beyond the base to be adjacent to the side wall..

The patent application was filed on 2021-04-09 (17/226431).

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