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R&D: PcGC, Parity-Check Garbage Collection for Boosting 3D NAND Flash Performance

Proposing parity-check garbage collection scheme called PcGC to revamp SSD performance by alleviating page waste during garbage collection

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems has published an article written by Shujie Pang, Department of Computer Science, Jinan University, Guangzhou, China,Yuhui Deng, Department of Computer Science, Jinan University, Guangzhou, China, and Wuhan National Laboratory for Optoelectronics, Wuhan, China,Genxiong Zhang, Department of Computer Science, Jinan University, Guangzhou, China, Yi Zhou, TSYS School of Computer Science, Columbus State University, Columbus, U.S., Xiao Qin, Department of Computer Science and Software Engineering, Auburn University, Alabama, U.S., Zhaorui Wu, and Jie Li, Department of Computer Science, Jinan University, Guangzhou, China.

Abstract: Garbage collection or GC running in the controller of 3D NAND flash-based solid-state disks – SSDs – plays a critical role in the performance of storage systems. SSD manufacturers have developed various garbage collection solutions based on internal data movement or IDM to mitigate the impacts of garbage collection on request latency. Due to the circuit characteristics of flash memory, existing IDM-based garbage collection strategies are restricted by the page parity during data movement: odd pages must be migrated to odd pages, and even pages to even pages. When migrating two consecutive pages with the same parity, the free page between the two migrated pages will be wasted after the migration is complete. This ever-increasing page waste problem inevitably deteriorates the storage space utilization of flash memory, thereby degrading the overall performance of 3D NAND flash-based SSDs. To address this issue, we propose a parity-check garbage collection scheme called PcGC to revamp SSD performance by alleviating page waste during garbage collection. We build a parity-check unit in PcGC to facilitate checking the parity of migrated valid pages and destination pages. According to the parity results offered by the parity-check unit, PcGC dynamically adjusts the migration order of valid pages during the course of garbage collection. In doing so, PcGC fundamentally averts page waste caused by the page parity restriction, thereby enhancing 3D NAND flash performance. We quantitatively evaluate the performance of PcGC in terms of wasted pages, storage utilization, GC counts, write amplification, and average response time. We compare PcGC against the two state-of-the-art schemes -Amphibian and TTflash. The experimental results derived from the nine real-world workload traces unfold that compared with Amphibian and TTflash, (1) PcGC curtails the number of wasted pages by up to 91.4% with an average of 53.75%, (2) cuts back the number of GC counts by up to 52.2% with an average of 11.9%, and (3) slashes average write response time by up to 77.8% with an average of 13.0%.

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