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R&D: Crossbar Arrays Based on ‘Wall’ PCM and Ovonic-Threshold Switching Selector, Device Integration Challenge Towards New Computing Paradigms in Embedded Applications

Demonstrate integration feasibility of Crossbar arrays based on Ovonic-Threshold Switching selector and ‘Wall’-based PCM, realized with a ‘Double-Patterned Self-Aligned’ structure in the Back-End-of-Line of CMOS fabrication.

HAL Open Science has published an article written by G. Bourgeois , V. Meli , R. Antonelli , C. Socquet-Clerc , T. Magis , F. Laulagnet , B. Hemard , M. Bernard , L. Fellouh , P. Dezest , J. Krawczyk , S. Dominguez , F. Baudin , J. Garrione , C. Pellissier , J.-A. Dallery , N. Castellani , M.-C. Cyrille , C. Charpin , F. Andrieu, and G. Navarro, CEA, LETI, Univ. Grenoble Alpes, F-38000 Grenoble, France.

Abstract: In this work, we demonstrate the integration feasibility of Crossbar arrays based on Ovonic-Threshold Switching (OTS) selector and “Wall”-based Phase-Change Memory, realized with a “Double-Patterned Self-Aligned” (DPSA) structure in the Back-End-of-Line (BEOL) of the CMOS fabrication. We fabricated devices with critical dimensions down to 60 nm×80 nm, integrating materials providing improved thermal stability (against BEOL thermal budget). Preliminary statistical electrical tests performed in 1 kb 1T1S1R arrays confirm the devices correct programming and cycling operations. These results pave the way to the integration of Crossbar arrays in embedded applications.

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