Phison Assigned Thirteen Patents

Memory control method, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11726709) developed by Zeng, Shih-Jia, Hsinchu, Taiwan, Yang, Yu-Siang, Chen, Szu-Wei, New Taipei, Taiwan, and Lin, Wei, Taipei, Taiwan, for “memory control method, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory control method, a memory storage device and a memory control circuit unit are provided. The method includes: determining a retry threshold value according to decoding history information which includes information related to at least one first decoding operation previously performed, and determining whether to enter a second decoding mode according to the retry threshold value after at least one second decoding operation performed based on a first decoding mode is failed. A decoding ability of the second decoding mode is higher than a decoding ability of the first decoding mode.”

The patent application was filed on 2020-08-17 (16/994668).

Data managing method, memory controlling circuit unit and memory storage device
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11687444) developed by Yeh, Chih-Kang, Kinmen County, Taiwan, for “data managing method. memory controlling circuit unit and memory storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data managing method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: receiving a write command for writing a plurality of first data into a rewritable non-volatile memory module, when the plurality of first data are continuous data, writing the plurality of first data respectively into a plurality of first physical erasing units by using a single-page programming mode, and recording first management information corresponding to the plurality of first physical erasing units, and when the plurality of first data are not the continuous data, writing the plurality of first data respectively into a plurality of second physical erasing units by using the single-page programming mode.”

The patent application was filed on 2019-10-14 (16/600568).

Crossing frames encoding management method, memory storage apparatus and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11669394) developed by Chang, Kuang-Yao, Taipei, Taiwan, and Chang, Cheng-Jui, New Taipei, Taiwan, for “crossing frames encoding management method, memory storage apparatus and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A crossing frames encoding management method, a memory storage apparatus, and a memory control circuit unit are disclosed. The method includes: reading a tag swap information corresponding to a first physical group, encoding a first data, storing a first part of the encoded first data to at least one first physical unit corresponding to a first tag information in the first physical group, and storing a second part of the encoded first data to at least one second physical unit corresponding to a second tag information in the first physical group according to the tag swap information. The first tag information corresponds to a first crossing frames encoding group. The second tag information corresponds to a second crossing frames encoding group. The first crossing frames encoding group is different from the second crossing frames encoding group.”

The patent application was filed on 2021-07-15 (17/376194).

Temperature control circuit, memory storage device and temperature control method
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11635777) developed by Yeh, Jia-Huei, Miaoli County, Taiwan, Huang, Chao-Ta, Miaoli, Taiwan, Li, Yi-Feng, Miaoli County, Taiwan, Chiu, Po-Chieh, Taoyuan, Taiwan, and Ling, Chun-Yu, Miaoli, Taiwan, for “temperature control circuit, memory storage device and temperature control method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A temperature control circuit for an electronic device is provided. The temperature control circuit includes a temperature detector, a status detection circuit and a control circuit. The temperature detector is configured to detect a temperature of the electronic device and generate first evaluation information. The status detection circuit is configured to detect a work status of at least one circuit module in the electronic device and generate second evaluation information. The control circuit is configured to adjust at least one electronic parameter of the electronic device according to the first evaluation parameter and the second evaluation parameter to control the temperature of the electronic device.”

The patent application was filed on 2019-05-30 (16/427289).

Signal modulation apparatus, memory storage apparatus, and signal modulation method
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11636902) developed by Wu, Guan-Wei, Wu, Jen-Chu, New Taipei, Taiwan, Wang, Jen-Huo, Tainan, Taiwan, Liao, Yu-Chiang, New Taipei, Taiwan, and Sun, Shih-Yang, Taoyuan, Taiwan, for “signal modulation apparatus, memory storage apparatus, and signal modulation method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A signal modulation apparatus, a memory storage apparatus, and a signal modulation method are disclosed. The signal modulation apparatus includes an observation circuit, a signal modulation circuit, and a phase control circuit. The signal modulation circuit is configured to generate a second signal according to a first signal and a reference clock signal. A frequency of the first signal is different from a frequency of the second signal. The phase control circuit is configured to obtain an observation information via the observation circuit. The observation information reflects a process variation of at least one electronic component in the signal modulation apparatus. The phase control circuit is further configured to control an offset between the first signal and the reference clock signal according to the observation information.”

The patent application was filed on 2021-09-08 (17/468711).

Memory control method, memory storage device, and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11615848) developed by Yang, Yu-Siang, New Taipei, Taiwan, Lin, Wei, Liu, An-Cheng,Taipei, Taiwan, Liu, Yu-Heng, Lai, Chun-Hsi, Hsinchu County, Taiwan, and Zhan, Ting-Chien, Hsinchu, Taiwan, for “memory control method, memory storage device, and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory control method, a memory storage device, and a memory control circuit unit are provided. The memory control method includes: programming multiple first memory cells in a first physical erasing unit in a rewritable non-volatile memory module, and applying an electronic pulse to at least one word line in the rewritable non-volatile memory module. The at least one word line is coupled to multiple second memory cells in the first physical erasing unit. The second memory cells include the first memory cells. The electronic pulse is not configured to read, program, or erase the second memory cells.”

The patent application was filed on 2021-03-29 (17/214958).

Memory storage apparatus with protection of command data in host buffer in response to system abnormality
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11614997) developed by Ho, Hsiao-Chi, Hsinchu County, Taiwan, for a “memory storage apparatus with protection of command data in a host buffer in response to a system abnormality.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method for managing a host memory buffer, a memory storage apparatus, and a memory control circuit unit are provided. The method includes: detecting whether a system abnormality occurs, copying a first command and first data corresponding to the first command stored in a data buffer of a host system to the memory storage apparatus in response to determining that the system abnormality occurs, executing an initial operation after copying the first command and the first data, wherein the initial operation initializes a part of a hardware circuit in the memory storage apparatus and does not initialize another part of the hardware circuit in the memory storage apparatus, and re-executing the first command stored in the memory storage apparatus after initializing the part of the hardware circuit.”

The patent application was filed on 2021-05-03 (17/306896).

Data storing method, memory control circuit unit and memory storage device
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11609822) developed by Tan, Kok-Yong, Miaoli County, Taiwan, for “data storing method, memory control circuit unit and memory storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storing method, a memory control circuit unit and a memory storage device are provided. The method includes the following. When the memory storage device is powered-on, it is determined whether a power loss state of the memory storage device matches an unexpected power loss state according to a power-off instruction. Data is written into a plurality of physical programming units using a single-page programming mode and not using a multi-page programming mode when it is determined that the power loss state matches the unexpected power loss state.”

The patent application was filed on 2021-06-03 (17/337428).

Data protection method, with disk array tags, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11604586) developed by Lin, Wei, Taipei, Taiwan, Hsu, Yu-Cheng, Lin, Hsiao-Yi, Yilan County, Taiwan, and Yang, Yu-Siang, New Taipei, Taiwan, for a “data protection method, with disk array tags, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data protection method, a memory storage device and a memory control circuit unit are provided. The method includes: setting a plurality of disk array tags corresponding to a plurality of word lines and a plurality of memory planes, and the plurality of disk array tags corresponding to one of the word lines connected to one of the memory planes are at least partially identical to the plurality of disk array tags corresponding to another one of the word lines connected to another one of the memory planes, receiving a write command and data corresponding to the write command from a host system, and sequentially writing the data into the plurality of word lines and the plurality of memory planes corresponding to the plurality of disk array tags.”

The patent application was filed on 2020-07-06 (16/921874).

Decoding circuit module, memory control circuit unit and memory storage device
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11599457) developed by Huang, Sheng-Min, Hsinchu County, Taiwan, for “decoding circuit module, memory control circuit unit and memory storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A decoding circuit module, a memory control circuit unit, and a memory storage device are disclosed. The decoding circuit module is configured to decode data read from a rewritable non-volatile memory module and the decoding circuit module includes a first buffer, a second buffer, a first decoding circuit, and a second decoding circuit. The first decoding circuit is configured to decode first data read from the rewritable non-volatile memory module and stored in the first buffer. The second decoding circuit is configured to decode second data read from the rewritable non-volatile memory module and stored in the second buffer. A data decoding ability of the first decoding circuit is different from a data decoding ability of the second decoding circuit. The second data is stored in the second buffer via the first buffer and is not decoded by the first decoding circuit.”

The patent application was filed on 2022-01-25 (17/583198).

Memory control method, memory storage device and memory control circuit unit
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11573704) developed by Lin, Wei, Taipei, Taiwan, Hsu, Yu-Cheng, Lin, Hsiao-Yi, Yilan County, Taiwan, and Yang, Yu-Siang, New Taipei, Taiwan, for “memory control method, memory storage device and memory control circuit unit.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory control method, a memory storage device and a memory control circuit unit are provided. The method includes: reading a first physical unit among a plurality of physical units based on a first electrical configuration to obtain first soft information, reading the first physical unit based on a second electrical configuration which is different from the first electrical configuration to obtain second soft information, classifying a plurality of memory cells in the first physical unit according to the first soft information and the second soft information, and decoding data read from the first physical unit according to a classification result of the memory cells.”

The patent application was filed on 2019-08-02 (16/529807).

Retiming circuit module, signal transmission system and signal transmission method
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11575496) developed by Wu, Jen-Chu, New Taipei, Taiwan, Hsiao, Ching-Jui, Miaoli County, Taiwan, Chang, Chun-Wei, Nantou County, Taiwan, Chen, Sheng-Wen, Hsinchu County, Taiwan, and Cheng, Ching-Chung, Taoyuan, Taiwan, for “retiming circuit module, signal transmission system and signal transmission method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A retiming circuit module, a signal transmission system and a signal transmission method are disclosed. The retiming circuit module includes a path control circuit and a multipath signal transmission circuit. The multipath signal transmission circuit includes a plurality of parallel signal transmission paths. The path control circuit is configured to control the multipath signal transmission circuit to perform signal transmission between an upstream device and a downstream device based on a first parallel signal transmission path in the parallel signal transmission paths during a period of a handshake operation performed between the upstream device and the downstream device. The path control circuit is further configured to control the multipath signal transmission circuit to perform the signal transmission based on a second parallel signal transmission path in the parallel signal transmission paths after the handshake operation is finished.”

The patent application was filed on 2021-12-10 (17/547241).

Flash memory control method of re-programming memory cells before erase operations, flash memory storage device and flash memory controller
Phison Electronics Corp., Miaoli, Taiwan, has been assigned a patent (11561719) developed by Yang, Yu-Siang, New Taipei, Taiwan, Lin, Wei, Liu, An-Cheng, Taipei, Taiwan, Liu, Yu-Heng, Lai, Chun-Hsi, Hsinchu County, Taiwan, and Zhan, Ting-Chien, Hsinchu, Taiwan, for “flash memory control method of re-programming memory cells before erase operations, flash memory storage device and flash memory controller.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A flash memory control method, a flash memory storage device and a flash memory controller are provided. The method includes the following. A flash memory module is instructed to perform a data merge operation to copy first data in a first physical unit into at least one second physical unit. After the first data is copied and before the first physical unit is erased, another programming operation is performed on the first physical unit to change a data storage state of at least a part of memory cells in the first physical unit from a first state into a second state. After the first physical unit is programmed, an erase operation is performed on the first physical unit.”

The patent application was filed on 2021-04-27 (17/242240).