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Longitude Flash Memory Solutions Assigned Patent

Memory transistor with multiple charge storing layers and high work function gate electrode

Longitude Flash Memory Solutions Ltd., Dublin, Ireland, has been assigned a patent (11721733) developed by Polishchuk, Igor, Fremont, CA, Levy, Sagy Charel, Zichron Yaakov, Israel, and Ramkumar, Krishnaswamy, San Jose, CA, for memory transistor with multiple charge storing layers and a high work function gate electrode.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Semiconductor devices including non-volatile memory transistors and methods of fabricating the same to improve performance thereof are provided. In one embodiment, the memory transistor comprises an oxide-nitride-oxide (ONO) stack on a surface of a semiconductor substrate, and a high work function gate electrode formed over a surface of the ONO stack. Preferably, the gate electrode comprises a doped polysilicon layer, and the ONO stack comprises multi-layer charge storing layer including at least a substantially trap free bottom oxynitride layer and a charge trapping top oxynitride layer. More preferably, the device also includes a metal oxide semiconductor (MOS) logic transistor formed on the same substrate, the logic transistor including a gate oxide and a high work function gate electrode. In certain embodiments, the dopant is a P+ dopant and the memory transistor comprises N-type (NMOS) silicon-oxide-nitride-oxide-silicon (SONOS) transistor while the logic transistor a P-type (PMOS) transistor. Other embodiments are also disclosed.

The patent application was filed on 2021-07-02 (17/366934).

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