Fmad Engineering Assigned Patent

Fmad Engineering Kabushiki Gaisha, Tokyo, Japan, has been assigned a patent (11704063) developed by Foo, Aaron, Tokyo, Japan, for an “efficient storage architecture for high speed packet capture.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An embodiment may involve a network interface module, volatile memory configured to temporarily store data packets received from the network interface module, high-speed non-volatile memory, an interface connecting to low-speed non-volatile memory, a first set of processors configured to perform a first set of operations that involve: (i) reading the data packets from the volatile memory, (ii) arranging the data packets into chunks, each chunk containing a respective plurality of the data packets, and (iii) writing the chunks to the high-speed non-volatile memory, and a second set of processors configured to perform a second set of operations in parallel to the first set of operations, where the second set of operations involve: (i) reading the chunks from the high-speed non-volatile memory, (ii) compressing the chunks, (iii) arranging the chunks into blocks, each block containing a respective plurality of the chunks, and (iv) writing the blocks to the low-speed non-volatile memory.”

The patent application was filed on 2021-05-14 (17/320393).