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Semibrain Assigned Patent

Logic compatible flash memory programming with pulse width control scheme

Semibrain Inc., Seongnam-si, Korea, has been assigned a patent (11694751) developed by Song, Seung-Hwan, Palo Alto, CA, for a logic compatible flash memory programming with a pulse width control scheme.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A selective non-volatile memory programming method for a selected memory cell in a memory array is described so as to reduce or avoid program disturbance on an unselected memory cell. This selective programming method comprises: applying a programming pulse to a selected memory cell to be programmed and an unselected memory cell, wherein the programming pulse allows a change of the unselected memory cell within a range specified, boosting a region of the unselected memory cell, and setting a threshold time of the programming pulse, wherein the threshold time is defined when an absolute magnitude of a voltage difference between a floating gate of the unselected memory cell and the boosted region of the unselected memory cell reaches a threshold value defined.

The patent application was filed on 2020-11-18 (16/951927).

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