Silicon Storage Technology Assigned Patent

Silicon Storage Technology, Inc., San Jose, CA, has been assigned a patent (11652162) developed by Zhou, Feng, Fremont, CA, Liu, Xian, Sunnyvale, CA, Su, Chien-Sheng, Do, Nhan, Saratoga, CA, and Wang, Chunming, Shanghai, China, for a “method of forming a three-gate non-volatile flash memory cell using two polysilicon deposition steps.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A simplified method for forming a non-volatile memory cell using two polysilicon depositions. A first polysilicon layer is formed on and insulated from the semiconductor substrate in a first polysilicon deposition process. An insulation block is formed on the first polysilicon layer. Spacers are formed adjacent first and second sides of the insulation block, and with the spacer adjacent the first side is reduced. Exposed portions of the first poly silicon layer are removed while maintaining a polysilicon block of the first polysilicon layer disposed under the insulation block. A second polysilicon layer is formed over the substrate and the insulation block in a second polysilicon deposition process. Portions of the second polysilicon layer are removed while maintaining a first polysilicon block (disposed adjacent the first side of the insulation block), and a second polysilicon block (disposed adjacent the second side of the insulation block).”

The patent application was filed on 2020-09-15 (17/021678).