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Everspin Technologies Assigned Two Patents

Midpoint sensing reference generation for STT-MRAM, dual standby modes in memory

Midpoint sensing reference generation for STT-MRAM
Everspin Technologies, Inc., Chandler, AZ, has been assigned a patent (11651807) developed by Alam, Syed M., Zhang, Yaojun, and Neumeyer, Frederick, Austin, TX, for a midpoint sensing reference generation for STT-MRAM.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The present disclosure is drawn to a magnetoresistive device including an array of memory cells arranged in rows and columns, each memory cell comprising a magnetic tunnel junction, each row comprising a word line, and each column comprising a bit line, a column select device that selects a bit line. The magnetoresistive device also includes a sense amplifier comprising a first input corresponding to a selected bit line, a second input corresponding to a reference bit line, and a data output. The plurality of columns comprise a reference column, the reference column comprising a conductive element coupled to the magnetic tunnel junctions in the reference column.

The patent application was filed on 2020-12-07 (17/113595).

Dual standby modes in memory
Everspin Technologies, Inc., Chandler, AZ, has been assigned a patent (11651802) developed by Alam, Syed M., Austin, TX, for systems and methods for dual standby modes in memory.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.

The patent application was filed on 2021-11-17 (17/455292).

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