Integrity verification of lifecycle-state memory using multi-threshold supply voltage detection
Nuvoton Technology Corporation, Hsin-Chu, Taiwan, has been assigned a patent (11636907) developed by Hershman, Ziv, Givat Shmuel, Israel, Hayon, Yoel, Givatayim, Israel, and Alon, Moshe, Tel-Aviv, Israel, for an “integrity verification of lifecycle-state memory using multi-threshold supply voltage detection.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “An Integrated Circuit (IC) includes a non-volatile memory (NVM) and secure power-up circuitry. The NVM is configured to store an operational state of the IC. The secure power-up circuitry is configured to (i) during a power-up sequence of the IC, perform a first readout of the operational state from the NVM while a supply voltage of the IC is within a first voltage range, (ii) if the operational state read from the NVM in the first readout is a state that permits access to a sensitive resource of the IC, verify that the supply voltage is within a second voltage range, more stringent than the first voltage range, and then perform a second readout of the operational state from the NVM, and (iii) initiate a responsive action in response to a discrepancy between the operational states read from the NVM in the first readout and in the second readout.”
The patent application was filed on 2020-06-30 (16/916142).
Nuvoton Technology Corporation, Hsin-Chu, Taiwan, has been assigned a patent (11630787) developed by Huang; Chih-Hung, New Taipei, Taiwan, Chiu; Kang-Fu, Hsinchu, taiwan, and Chang; Hao-Yang, Miaoli County, Taiwan, for a “bus system.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A bus system is provided. A memory device is electrically connected to a master device via a serial peripheral interface (SPI) bus. A plurality of slave devices are electrically connected to the master device via an enhanced SPI (eSPI) bus. Each of the slave devices has an alert handshake pin. The alert handshake pins of the slave devices are electrically connected together via an alert-handshake control line. The first slave device is electrically connected to the memory device via the SPI bus. After obtaining a program code from the memory device, the first slave device verifies the program code using a security code and controls the alert-handshake control line to unlock all the slave devices except for the first slave device via the alert handshake pin in response to the program code being verified. The unlocked slave devices communicate with the master device via the eSPI bus.”
The patent application was filed on 2021-12-15 (17/551399).
Multi-stage provisioning of secret data
Nuvoton Technology Corporation, Hsin-Chu, Taiwan, has been assigned a patent (11574079) developed by Morav; Dan, Herzliya, Israel, Hershman; Ziv, Givat Shmuel, Israel, and Tanami; Oren, Ra’anana, Israel, for a “multi-stage provisioning of secret data.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method for provisioning an electronic device includes providing a semiconductor wafer on which multiple integrated circuit (IC) chips have been fabricated. Each chip includes a secure memory and programmable logic, which is configured to store at least two keys in the secure memory and to compute digital signatures over data using the at least two keys. A respective first key is provisioned into the secure memory of each of the chips via electrical probes applied to contact pads on the semiconductor wafer. After dicing of the wafer, a respective second key is provisioned into the secure memory of each of the chips via contact pins of the chips. A respective provisioning report is received from each of the chips with a digital signature computed by the logic using both of the respective first and second keys. The provisioning is verified based on the digital signature.”
The patent application was filed on 2021-05-27 (17/331665).