R&D: Extending and Programming NVMe I/O Determinism Interface for Flash Arrays

ACM Transactions on Storage has published an article written by Huaicheng Li, University of Chicago and Carnegie Mellon University, Martin L. Putra, Ronald Shi, University of Chicago, Fadhil I. Kurnia, University of Massachusetts Amherst, Xing Lin, NetApp, Jaeyoung Do, Microsoft Research, Achmad Imam Kistijantoro, Bandung Institute of Technology, Gregory R. Ganger, Carnegie Mellon University, and Haryadi S. Gunawi, University of Chicago.

Abstract: “Predictable latency on flash storage is a long-pursuit goal, yet unpredictability stays due to the unavoidable disturbance from many well-known SSD internal activities. To combat this issue, the recent NVMe IO Determinism (IOD) interface advocates host-level controls to SSD internal management tasks. Although promising, challenges remain on how to exploit it for truly predictable performance.“

“We present IODA,1 an I/O deterministic flash array design built on top of small but powerful extensions to the IOD interface for easy deployment. IODA exploits data redundancy in the context of IOD for a strong latency predictability contract. In IODA, SSDs are expected to quickly fail an I/O on purpose to allow predictable I/Os through proactive data reconstruction. In the case of concurrent internal operations, IODA introduces busy remaining time exposure and predictable-latency-window formulation to guarantee predictable data reconstructions. Overall, IODA only adds five new fields to the NVMe interface and a small modification in the flash firmware while keeping most of the complexity in the host OS. Our evaluation shows that IODA improves the 95–99.99th latencies by up to 75×. IODA is also the nearest to the ideal, no disturbance case compared to seven state-of-the-art preemption, suspension, GC coordination, partitioning, tiny-tail flash controller, prediction, and proactive approaches.“