R&D: Read Disturbances in Cross-Point Phase-Change Memory Arrays – Part I: Physical Modeling with Phase-Change Dynamics

IEEE Transactions on Electron Devices has published an article written by Donguk Kim, Jun Tae Jang, Changwook Kim, School of Electrical Engineering, Kookmin University, Seoul, South Korea, Hyun Wook Kim, Eunryeong Hong, School of Electronic and Electrical Engineering, Kyungpook National University, Daegu, South Korea, Sanghyun Ban, Minchul Shin, Hanwool Lee, Hyung Dong Lee, SK Hynix, Icheon-si, South Korea, Hyun-Sun Mo, School of Electrical Engineering, Kookmin University, Seoul, South Korea, Jiyong Woo, School of Electronic and Electrical Engineering, Kyungpook National University, Daegu, South Korea, and Dae Hwan Kim, School of Electrical Engineering, Kookmin University, Seoul, South Korea.

Abstract: “ Phase-change memory (PCM) connected to an additional selector has been implemented in cross-point arrays for storage class memory applications. In the one-PCM and one-selector (1S-1R) configuration, the selector should be turned on first to read the resistance state of the PCM. This requires a large read voltage ( Vread ), and a high read current from the PCM is instantly produced, which causes read disturbances. To understand the underlying mechanism of the disturbance, in this study, we developed a physics-based Verilog-A model to describe the measured electrical behavior of the 1S-1R cell in HSPICE by considering thermally induced crystallization and melting dynamics. Based on VTH , which is the voltage induced when the selector is on, the crystalline and amorphous phases of the PCM can be identified indirectly. Based on the measured data, when the pristine amorphous state of the PCM is programmed by a higher SET current ( ISET ), VTH decreases owing to enhanced crystallization, leading to a low-resistance state. However, VTH subsequently begins to increase with respect to ISET, which results in a U-shaped VTH – ISET curve. It is inferred that melting is preferred at temperatures above 900 K induced by the high-read current. The VTH increase induced by the amorphization can be explained by transient simulations. The simulation results are in good agreement with the experimental data and reveal that the temperature generated from the 1S-1R cell plays an important role in triggering the unwanted phase transition of the GeSbTe layer during the read operation.“