Samsung Assigned Twenty Patents

Storage device and operating method
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11526287) developed by So, Hyejeong, Hwaseong-si, Korea, Seol, Changkyu, Osan-si, Korea, Son, Hong Rak, Anyang-si, Korea, Yoon, Pilsang, Hwaseong-si, Korea, Lim, Jinsoo, Seoul, Korea, Jang, Jae Hun, and Choi, Seonghyeong, Hwaseong-si, Korea, for “storage device and operating method of storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device is provided including a memory controller having a neural processing unit (NPU), a first nonvolatile memory (NVM) connected to the memory controller through a first channel, and a second NVM connected to the memory controller through a second channel. The first NVM stores first weight data for the NPU and the second stores second weight data for the NPU. The memory controller is configured to determine one of the first and second channels that is less frequently accessed upon receiving an inference request from the neural processor, and access a corresponding one of the first weight data and the second weight data using the determined one channel.”

The patent application was filed on 2020-03-24 (16/828170).

Operation method of NVM
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11527296) developed by Jung, Doo-Yeun, Suwon-si, Korea, Cho, Young-Jin, Seoul, Korea, Nam, Bu-Il, Lee, Nari, Hwaseong-si, Korea, Nam, Yeji, Suwon-si, Korea, and Yoon, Sangyong, Seoul, Korea, for an “operation method of nonvolatile memory device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An operation method of a nonvolatile memory device which includes a memory block having wordlines includes performing an erase on the memory block, performing a block verification on the memory block by using a 0-th erase verification voltage, performing a delta verification on the memory block by using a first erase verification voltage different from the 0-th erase verification voltage when a result of the block verification indicates a pass, and outputting information about an erase result of the memory block based on the result of the block verification or a result of the delta verification. The delta verification includes generating delta counting values respectively corresponding to wordline groups by using the first erase verification voltage, generating a delta value based on the delta counting values, and comparing the delta value and a first reference value.”

The patent application was filed on 2021-04-16 (17/232370).

Storage device
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11520896) developed by Kwon, Jin Taek, Seoul, Korea, Yoon, Ye Jin, Lee, Seung-Jae, Hwaseong-si, Korea, and Kim, Ji Soo, Seongnam-si, Korea, for a “storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device is provided. The storage device includes a boot ROM stores a plurality of public keys and a boot ROM image, an OTP memory identifies a first public key among the plurality of public keys, a first memory including a first area the stores the plurality of public keys and a flash boot image different from the boot ROM image, and a second area that stores a first boot signature corresponding to the flash boot image, a second memory including a first firmware image including a first firmware signature, and a memory controller that receives a second firmware image including a second firmware signature and a second boot signature, receives a second public key among the plurality of public keys and the flash boot image based on the second firmware image being received, and write the second boot signature in the second area of the first memory.”

The patent application was filed on 2021-04-22 (17/237532).

Magnetic memory
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11522123) developed by Sonobe, Yoshiaki, and Honda, Syuta, Suwon-si, Korea, for a “magnetic memory device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A magnetic memory device includes a magnetic body having magnetic anisotropy and an insulator including a ferromagnetic element. The magnetic body is structurally connected to both ends of the ferromagnetic insulator, and the magnetic body and the ferromagnetic insulator form a ring shape. An easy axis of the magnetic body is directed in a direction parallel to an opening surface of the ring shape in a whole of the magnetic body.”

The patent application was filed on 2020-08-19 (16/997162).

3D semiconductor memory
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11521981) developed by Jung, Kwangyoung, Hwaseong-si, Korea, Jo, Sangyoun, Suwon-si, Korea, Kanamori, Kohji, Seongnam-si, Korea, and Han, Jeehoon, Hwaseong-si, Korea, for a “three-dimensional (3D) semiconductor memory device“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A 3D semiconductor memory device includes a peripheral circuit structure including a first row decoder region, a second row decoder region, and a control circuit region between the first and second row decoder regions, a first electrode structure and a second electrode structure on the peripheral circuit structure, spaced apart in a first direction, and each including stacked electrodes, a mold structure on the peripheral circuit structure between the first and second electrode structures and including stacked sacrificial layers, vertical channel structures penetrating the first and second electrode structures, a separation insulating pattern provided between the first electrode structure and the mold structure and penetrating the mold structure, and a separation structure intersecting the first electrode structure in the first direction and extending to the separation insulating pattern, wherein a maximum width of the separation insulating pattern in a second direction is greater than a maximum width of the separation structure in the second direction.”

The patent application was filed on 2020-11-12 (17/095821).

Storage devices, systems and methods of operating
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11513728) developed by Lee, Su-Ryun, Suwon-si, Korea, and Lee, Bum-Hee, Hwaseong-si, Korea, for “storage devices, data storage systems and methods of operating storage devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device includes a main storage and a storage controller to control the main storage. The main storage stores data and includes a plurality of nonvolatile memory devices. The storage controller loads at least one of (a) at least a portion of mapping tables and (b) at least one of a portion of directories to a host memory buffer included in an external host device, based on at least one of a size of the host memory buffer and locality information associated with a data access pattern of the host device. The mapping tables are stored in the nonvolatile memory devices and the mapping tables indicate a mapping relationship between a physical address and a logical address of corresponding ones of the nonvolatile memory devices. The directories store address information of the mapping tables.”

The patent application was filed on 2021-05-10 (17/316422).

NVM including peripheral circuit to verify program operation
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11508443) developed by Park, Gyu-Ha, and Kim, Hyungsuk, Hwaseong-si, Korea, for a “nonvolatile memory device including a peripheral circuit to verify a program operation.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A nonvolatile memory device includes a memory cell array including a plurality of memory cells, and a peripheral circuit that performs a program operation of repeatedly performing a program loop. The program loop includes performing a program by applying a program voltage to memory cells selected from the plurality of memory cells, and a first verify by applying a plurality of verify voltages to the selected memory cells. The peripheral circuit completes the program operation in response to a success of the first verify, performs a second verify by applying an additional verify voltage different from the plurality of verify voltages to the selected memory cells, and determines the program operation has failed in response to a failure of the second verify.”

The patent application was filed on 2020-08-27 (17/004074).

NVM, method of operating, and memory system including device
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11507448) developed by Kim, Heejin, Suwon-si, Korea, and Yoon, Hyunjun, Changwon-si, Korea, for “non-volatile memory device, method of operating the device, and memory system including the device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A non-volatile memory device, a method of operating the non-volatile memory device, and a memory system including the non-volatile memory device are provided. A non-volatile memory device includes a memory cell array including a plurality of memory cells configured to be each programmed to one of a plurality of s, a page buffer circuit including a plurality of page buffers configured to each store received data as data indicating a target of a corresponding one of the plurality of memory cells, the page buffer circuit being configured to perform a data reordering operation of changing a first data order into a second data order during performance of a program operation on selected memory cells of the plurality of memory cells, and a reordering control circuit configured to control the page buffer circuit to perform the data reordering operation simultaneously with the program operation.”

The patent application was filed on 2019-12-10 (16/708988).

Storage device that determines write area of read reclaim operation based
on estimated read count of reclaim area and operating method of storage device
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11508451) developed by Lee, Kwangwoo, Hong, Jinwoo, Seoul, Korea, and Lee, Yunjung, Suwon-si, Korea, for “storage device that determines write area of read reclaim operation based on estimated read count of reclaim area and operating method of the storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device includes a nonvolatile memory device that includes a first storage area and a second storage area. A controller of the storage device controls the nonvolatile memory device and performs a read reclaim operation of reading data stored in the first storage area of the nonvolatile memory device and writing the read data in the second storage area. In the read reclaim operation, the controller is further configured to allow the nonvolatile memory device to perform sample read operations on the first storage area and to determine locations of the second storage area, at which the data are to be written, based on results of the sample read operations.”

The patent application was filed on 2020-08-18 (16/996266).

Storage device for accelerating write speed and read speed
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11507311) developed by Park, Jeong-Woo, and Kim, Dong-Min, Hwaseong-si, Korea, for a “storage device for accelerating write speed and read speed.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device including a nonvolatile memory device is described. The storage device includes a controller that receives a write command and data from an external host device. The controller preferentially writes the data in an area based on a normal write policy when the data is associated with a normal write, and in an area based on a turbo write policy when the data is associated with a turbo write. The controller may also receive a read command, to read data from an area based on the read command, and output the data to the external host device. The controller may also move the data in response to move information of the read command when the read command is received together with move information.”

The patent application was filed on 2020-06-08 (16/895288).

Storage device and method for accelerating storage device write and read speed
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11507312) developed by Park, Jeong-Woo, Kim, Dong-Min, Hwaseong-si, Korea, Kim, Youngmoon, Suwon-si, Korea, and Lee, Kyoung Back, Hwaseong-si, Korea, for “storage device and method for accelerating storage device write and read speed.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device that includes a nonvolatile memory device is described. The storage device includes areas and a controller. The controller receives a write command and data from an external host device. The controller then preferentially writes the data in an area associated with a turbo write based on a turbo write policy, or in an area not associated with a turbo write based on a normal write policy. The controller also receives a move command from the external host device and moves data stored in the area to a different area based on the move command.”

The patent application was filed on 2020-06-09 (16/896839).

System and method for In-SSD data processing engine selection based on stream ids
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11500587) developed by Yang, Jing, Yang, Jingpei, San Jose, CA, and Pitchumani, Rekha, Oak Hill, VA, for “system and method for In-SSD data processing engine selection based on stream ids.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A multi-stream memory system includes an in-device data processor including a first data processing engine and a second data processing engine, a controller processor, and a processor memory coupled to the controller processor, wherein the processor memory has stored thereon instructions that, when executed by the controller processor, cause the controller processor to perform: identifying a stream ID of an input stream, identifying the first data processing engine as being associated with the stream ID based on a stream assignment table, and applying the first data processing engine to the input stream to generate processed data.”

The patent application was filed on 2020-12-09 (17/117008).

Storage device that uses host memory buffer and memory management
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11501843) developed by Lee, Dong-Ryoul, Incheon, Korea, Yi, Hyun Ju, Hwaseong-si, Korea, Sim, Jaeho, Eom, Kicheol, Seoul, Korea, and Leem, Hyotaek, Hwaseong-si, Korea, for “storage device that uses a host memory buffer and a memory management method including the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device is provided which shares a host memory with a host. The storage device includes an interface that exchanges data with the host and implements a protocol to use a partial area of the host memory as a buffer of the storage device. A storage controller of the storage device monitors deterioration information of a first area of the buffer and transmits a corruption prediction notification associated with the first area to the host based on a result of the monitoring.”

The patent application was filed on 2021-05-04 (17/307314).

Storage controller and method of restoring error
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11500728) developed by Seo, Jinho, Seongnam-si, Korea, Eom, Sanghyun, Busan, Korea, Kim, Taecjun, Jung, Jinwoo, Seoul, Korea, and Choi, Eunsik, Yongin-si, Korea, for “storage controller and method of restoring error of the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage controller includes a host interface configured to perform communication with a host device, a memory interface configured to perform communication with a nonvolatile memory device, a higher-level controller, and a lower-level controller. The higher-level controller issues operations to be performed by the nonvolatile memory device based on requests transferred through the host interface. The lower-level controller includes an operation memory configured to store an operation code and operation data. The lower-level controller controls the memory interface based on the operation code and the operation data such that the nonvolatile memory device performs issued operations received from the higher-level controller. The higher-level controller performs, when an error occurs in the lower-level controller, an error restoring operation based on information of the lower-level controller to restore the lower-level controller to a previous corresponding to a before the error occurs.”

The patent application was filed on 2021-07-13 (17/374389).

Storage device, operation method of storage system including storage device in which data stored in apinned buffer area and non-pinned buffer area is flushed according to flush request/policy, and host device controlling storage device
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11500583) developed by Cho, Hyunsoo, Bucheon-si, Korea, Kim, Dong-Min, and Lee, Kyoung Back, Hwaseong-si, Korea, for “storage device, an operation method of a storage system including the storage device in which data stored in apinned buffer area and a non-pinned buffer area is flushed according to a flush request/policy, and a host device controlling the storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device including: a nonvolatile memory device including a first, second and third area, and a controller to receive a first write command including a first logical block address from a host, to receive first data corresponding to the first logical block address in response to the first write command, and store the first data in the nonvolatile memory device, when the first write command includes area information, the controller stores the first data in the first area or the second area based on the area information, when the first write command does not include the area information, the controller stores the first data in the third area, each of the first area and the second area includes memory cells each storing “n” bits (n being a positive integer), and the third area includes memory cells each storing “m” bits (m being a positive integer greater than n).”

The patent application was filed on 2020-07-30 (16/943268).

NVM with address re-mapping
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11501847) developed by Choi, Yonghyuk, Suwon-si, Korea, Nam, Sangwan, Hwaseong-si, Korea, Yu, Jaeduk, Park, Sangwon, and Lim, Bongsoon, Seoul, Korea, for a “nonvolatile memory device with address re-mapping.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A nonvolatile memory device includes memory cell region including a first metal pad and a peripheral circuit region including a second metal pad, is connected to the memory cell region by the first metal pad and the second metal pad and includes including an address decoder and a page buffer circuit located on a first substrate. A memory cell array is provided in the memory cell region, which includes a first vertical structure on a second substrate. The first vertical structure includes first sub-blocks and first via areas in which one or more through-hole vias are provided, and through-hole vias pass through the first vertical structure. A control circuit in the peripheral circuit region groups the memory blocks into a plurality of groups based on whether the memory blocks is close to the first via areas and performs address re-mapping ”

The patent application was filed on 2020-09-16 (17/022967).

Storage and method of dynamically managing power of storage system according to monitored operating of computing device
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11494094) developed by Hong, Jung-Hyun, Ryu, Sueng-Chul, Hwaseong-si, Korea, and Cho, Han-Min, Seoul, Korea, for “storage system and method of dynamically managing power of storage system according to a monitored operating of a computing device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage system and an operating method thereof are disclosed. The storage system includes a nonvolatile memory that stores data, a computing device to perform data processing on input data provided from the nonvolatile memory or a host outside the storage system, and a controller to control a writing operation and a reading operation of the nonvolatile memory, monitor an operating of the computing device while the computing device is performing the data processing, and dynamically manage power of the computing device according to a monitoring result.”

The patent application was filed on 2019-07-11 (16/508711).

NVM and operating method
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11495291) developed by Kim, Seungbum, Suwon-si, Korea, for “non-volatile memory device and operating method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An operating method for a non-volatile memory device includes, performing a read operation on adjacent memory cells connected to an adjacent word line proximate to a target word line to determine adjacent data, classifying target memory cells connected to the target word line into groups according to the adjacent data, setting a read voltage level for each of the groups by searching for a read voltage level for target memory cells in at least one of the groups, and performing a read operation on target memory cells using the read voltage level set for each of the groups.”

The patent application was filed on 2020-12-02 (17/109410).

Storage device including power supply circuit and method of operating
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11495320) developed by Kim, Heejong, Seoul,Korea , and Kim, Gunbae, Seongnam-si, Korea, for “storage device including power supply circuit and method of operating storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device includes a power supply circuit that receives a power disable signal from a host device and provides a first internal voltage and a second internal voltage, a non-volatile memory including a memory device, and a storage controller that controls the non-volatile memory and includes a processor that performs a data recovery operation on data stored in the memory device and a host interface that communicates with the host device. When the power disable signal is activated at a power off time, the storage controller is powered off, the power supply circuit interrupts the first internal voltage and the second internal voltage during a reference time following the power off time, and provides the first internal voltage to the processor after the reference time has elapsed following the power off time.”

The patent application was filed on 2021-02-08 (17/169643).

Storage device and system including same
Samsung Electronics CO., Ltd., Suwon-si, Korea, has been assigned a patent (11487677) developed by Shin, Min Gon, Uiwang-si, Korea, Kim, Ji Soo, Seongnam-si, Korea, Lee, Seung-Jae, Yoon, Ye Jin, Hwaseong-si, Korea, and Lee, Hwa Soo, Suwon-si, Korea, for “storage device and a storage system including the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device including: a bridge board to receive a first command, an authenticator to receive user information, and a memory device to receive the first command from the bridge board, the memory device includes a memory controller which determines a status of the memory device, provides status information including the determined status of the memory device to the bridge board, determines the status of the memory device as an unlocked status or a locked status, the bridge board includes a transceiver which communicates with the host through an interface, a register which stores interface information, and a bridge board controller which generates a first response to the first command in a format corresponding to the interface using the interface information, and provides the first response to a host, the first response includes a status bit which inhibits or allows a write operation with respect to the memory device.”

The patent application was filed on 2020-08-18 (16/996304).