Winbond Electronics Assigned Sixteen Patents

Memory structure and manufacturing
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11527537) developed by Lin, Keng-Ping, Li, Shu-Ming, and Ou Yang, Tzu-Ming, Taichung, Taiwan, for “memory structure and manufacturing method thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory structure including a substrate, a bit line structure, a contact structure, a stop layer, and a capacitor structure is provided. The substrate includes a memory array region. The bit line structure is located in the memory array region and located on the substrate. The contact structure is located in the memory array region and located on the substrate on one side of the bit line structure. The stop layer is located in the memory array region and located above the bit line structure. The capacitor structure is located in the memory array region. The capacitor structure passes through the stop layer and is electrically connected to the contact structure. A bottom surface of the capacitor structure is lower than a bottom surface of the stop layer.”

The patent application was filed on 2021-05-03 (17/306874).

Memory devices and methods for forming
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11527475) developed by Tseng, Ling-Chun, Lee, Shu-Ming, Taichung, Taiwan, and Ou Yang, Tzu-Ming, Tainan, Taiwan, for “memory devices and methods for forming the same.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory device includes a substrate, a bit line, a first insulating film, a second insulating film, a third insulating film, and a contact. The bit line is disposed over the substrate. The first insulating film is disposed on a sidewall of the bit line. The second insulating film is disposed on the first insulating film and is made of a different material than the first insulating film. The third insulating film is disposed on the second insulating film and is made of a different material than the second insulating film. The top surfaces of the second insulating film and the third insulating film are lower than the top surface of the first insulating film. The contact is disposed over the substrate and adjacent to the bit line. The width of the lower portion of the contact is less than the width of the upper portion of the contact.”

The patent application was filed on 2020-09-30 (17/039558).

Write method for resistive memory
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11520526) developed by Wang, Ping-Kun, Liao, Shao-Ching, Wu, Chien-Min, Ho, Chia Hua, Chen, Frederick, Chao, He-Hsuan, and Lim, Seow-Fong, Taichung, Taiwan, for a “write method for resistive memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A write method for a resistive memory including a storage array, a control circuit and an access circuit is provided. The control circuit receives an external command to activate the access circuit to access the storage array. The write method includes determining whether the external command is ready to perform a write operation for the storage array, generating a first operation voltage group to the access circuit when the external command does not perform the write operation for the storage array, reading a count value of a block that corresponds to a write address when the external command performs the write operation for the storage array, wherein the count value indicates the number of times that the block corresponding to the write address performs the write operation, and generating a second operation voltage group to the access circuit according to the count value of the block.”

The patent application was filed on 2021-06-02 (17/337003).

Memory storage apparatus and operating method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11501807) developed by Chiang, Ju-An, and Chang, Ya-Wen, Taichung, Taiwan, for “memory storage apparatus and operating method thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory storage apparatus including a memory circuit and a memory controller is provided. The memory circuit is configured to store data. The memory controller is coupled to the memory circuit via a data bus. The memory controller performs initial setting of the memory circuit on the basis of a width of the data bus. In addition, an operating method of a memory storage apparatus is also provided.”

The patent application was filed on 2021-06-08 (17/341387).

Memory structure and method of manufacturing
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11502093) developed by Chiang, Chang-Ming, Chiayi County, Taiwan, Huang, Hsuan-Jung, Taoyuan, Taiwan, Hsu, Che-Jui, Taichung, Taiwan, and Liou, Liann-Chern, Hsinchu County, Taiwan, for “memory structure and method of manufacturing the same.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory structure and its manufacturing method are provided. The memory structure includes a substrate, a tunnel dielectric layer on the substrate and a floating gate on the tunnel dielectric layer. The substrate has a source region and a drain region, and the source region and the drain region are formed on two opposite sides of the floating gate. The memory structure also includes an inter-gate dielectric layer on the floating gate and a control gate on the inter-gate dielectric layer. The memory structure further includes a doping region buried in the floating gate, wherein a sidewall of the doping region is exposed at a sidewall of the floating gate. Also, the doping region and the inter-gate dielectric layer are separated from each other.”

The patent application was filed on 2020-08-07 (16/988266).

RRAM and manufacturing method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11502131) developed by Cheng, Chia-Wen, Wang, Ping-Kun, Chen, Yi-Hsiu, and Chao, He-Hsuan, Taichung, Taiwan, for “resistive random access memory device and manufacturing method thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A resistive random access memory (RRAM) device and a manufacturing method are provided. The RRAM device includes bottom electrodes, a resistance switching layer, insulating patterns, a channel layer and top electrodes. The resistance switching layer blanketly covers the bottom electrodes. The insulating patterns are disposed on the resistance layer and located in corresponding to locations of the bottom electrodes. The channel layer conformally covers the resistance switching layer and the insulating patterns. The channel layer has a plurality of channel regions. The channel regions are located on the resistance switching layer, and cover sidewalls of the insulating patterns. The top electrodes respectively cover at least two of the channel regions, and respectively located in corresponding to one of the insulating patterns, such that the at least two of the channel regions are located between one of the bottom electrodes and one of the top electrodes.”

The patent application was filed on 2020-11-19 (16/952085).

Variable resistance random-access memory and method for write operation having error bit recovering function thereof
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11494259) developed by Hattori, Norio, Kanagawa, Japan, for “variable resistance random-access memory and method for write operation having error bit recovering function thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Provided is a variable resistance random-access memory for suppressing degradation of performance by recovering a memory cell that fails. A variable resistance random-access memory of the disclosure includes a memory array, a row selection circuit, a column selection circuit, a controller, an error checking and correcting (ECC) circuit, an error bit flag register, and an error bit address register. The memory array includes a plurality of memory cells. The column selection circuit includes a sense amplifier and a write driver/read bias circuit. The error bit flag register stores bits for indicating presence/absence of an error bit in a write operation. The error bit address register stores an address of the error bit. The controller recovers the error bit when a predetermined event occurs.”

The patent application was filed on 2020-12-11 (17/118622).

Memory circuit and programming method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11495312) developed by Ho, Wen-Chiao, and Ryoo, Pil-Sang, Taichung, Taiwan, for “memory circuit and memory programming method.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory circuit and a memory programming method adapted to program flash memory are provided. The memory circuit includes a charge pumping circuit, a voltage regulator, a voltage sensor, and a plurality of switch circuits. The charge pumping circuit generates a pumping voltage and a pumping current. The voltage regulator is coupled to the charge pumping circuit and generates a programming voltage and a programming current to program the flash memory according to the pumping voltage and the pumping current. The voltage sensor is coupled to the voltage regulator to monitor a voltage value of the programming voltage. Each of the plurality of switch circuits includes a first terminal coupled to the voltage sensor and a second terminal coupled to the flash memory. A quantity of the plurality of switch circuits that are turned on is determined by the voltage value of the programming voltage.”

The patent application was filed on 2021-05-20 (17/326294).

Memory device and control method thereof for fast read
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11495304) developed by Ho, Wen-Chiao, Taichung, Taiwan, for “memory device and control method thereof for fast read.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A control method of a memory device is provided. When a target memory cell whose source is connected to a first source line needs to be read, a word line controller provides a first voltage to a word line corresponding to the target memory cell and also provides the first voltage to a word line corresponding to the next row of the target memory cell, so that the period when the word line corresponding to the target memory cell remains at the first voltage overlaps the period when the word line corresponding to the next row of the target memory cell remains at the first voltage. When the target memory cell needs to be read, a source line controller provides a second voltage to the first source line, and provides a third voltage to the second source line, the third voltage is not equal to the second voltage.”

The patent application was filed on 2021-07-23 (17/384172).

RRAM and method of manufacturing
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11495637) developed by Hsu, Po-Yen, Tsai, Shih-Ning, Wu, Bo-Lun, and Kuo, Tse-Mian, Taichung, Taiwan, for “resistive random access memory and method of manufacturing the same.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Provided are a resistive random access memory and a method of manufacturing the same. The resistive random access memory includes a stacked structure and a bit line structure. The stacked structure is disposed on a substrate. The stacked structure includes a bottom electrode, a top electrode and a resistance-switching layer. The bottom electrode is disposed on the substrate. The top electrode is disposed on the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The bit line structure covers a top surface of the stacked structure and covers a portion of a sidewall of the stacked structure. The bit line structure is electrically connected to the stacked structure.”

The patent application was filed on 2020-07-01 (16/919047).

Semiconductor device and reading method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11488644) developed by Okabe, Sho, and Senoo, Makoto, Kanagawa, Japan, for “memory device and control method thereof for fast read.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A semiconductor device capable of performing high-speed read or high-reliability read is provided. A reading method of a NAND flash memory includes: pre-charging a sensing node through a voltage-supply node, discharging the sensing node to the voltage-supply node for a prescribed operation, recharging the sensing node by the voltage-supply node after the prescribed operation, and discharging a NAND string and sensing a memory cell.”

The patent application was filed on 2021-05-14 (17/320224).

Semiconductor storing apparatus and flash memory operation
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11487343) developed by Sudo, Naoaki, Kanagawa, Japan, for “semiconductor storing apparatus and flash memory operation method.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A semiconductor storing apparatus and a flash memory operation method, for shortening a recovery time from a deep power-down (DPD) mode without a dedicated command for the DPD are provided. A flash memory includes: a standard command interface circuit and a DPD controller, operating through an external power voltage, a voltage supply node, for supplying power from the external power voltage via a first current path, a voltage supply node, for supplying power from the external power voltage via a second current path, an internal circuit group, connected to the voltage supply node, and a charge pump circuit, connected to the voltage supply node. When the DPD mode is released, the internal circuit group is enabled after the charge pump circuit is enabled.”

The patent application was filed on 2020-05-26 (16/882762).

Semiconductor storing apparatus and readout
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11487614) developed by Senoo, Makoto, Kanagawa, Japan, for “semiconductor storing apparatus and readout method.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A semiconductor storing apparatus capable of shortening a ECC processing time of a readout operation is provided, including a flash memory includes: a memory cell array, a page buffer/sense circuit holding data read out from a selected page of the memory cell array, an error correcting code circuit receiving data from the page buffer/sense circuit and holding error address information of the data, an output circuit selecting data from the page buffer/sense circuit based on a column address, and outputting the selected data to a data bus, and an error correction part correcting data of the data bus based on the error address information.”

The patent application was filed on 2021-03-03 (17/191670).

Control device and memory system for deep power-down mode
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11456026) developed by Chiu, Liang-Hsiang, and Chen, Yu-Chieh, Taichung, Taiwan, for “control device and memory system for deep power-down mode.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A control device and a memory system are provided. The control device includes a first peripheral circuit group and a second peripheral circuit group. The first peripheral circuit group and a memory array are driven by a first voltage in a standby mode. The first peripheral circuit group provides a control command when recognizing that a command string is a deep power-down (DPD) execution command string. When receiving the control command, the second peripheral circuit group provides a DPD signal having a first logic value to stop providing the first voltage so that the memory system enters a DPD mode. In the DPD mode, when recognizing that the command string is a DPD exit command string, the second peripheral circuit group provides a DPD signal having a second logic value to provide the first voltage so that the memory system enters standby mode.”

The patent application was filed on 2021-03-09 (17/196969).

Memory structure with marker bit and operation method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11443814) developed by Lin, Chi-Shun, Fremont, CA, for “memory structure with marker bit and operation method thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory structure and an operation method are provided. The memory structure comprises a memory array, having plural blocks, each of the blocks having plural word lines coupled to memory cells; and one marker bit column having one or plural marker bit units, and the one plural marker bit units being coupled to one or the plural word lines. In performing a block erase operation to the blocks of the memory array, for each block, the controller pre-reads the data from the marker bit unit is pre-read, and the marker bit unit is erased during performing the block erase operation if the marker bit indicates a program state, and the block erase operation is skipped if the marker bit indicates an erase state.”

The patent application was filed on 2021-05-27 (17/331661).

Resistive memory storage apparatus and operating method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11437101) developed by Lin, Lih-Wei, Cheng, Lung-Chi, Cheng, Ju-Chieh, and Kuo, Ying-Shan, Taichung, Taiwan, for “resistive memory storage apparatus and operating method thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A resistive memory storage apparatus including a memory cell, a selecting transistor and a memory controller is provided. The memory cell outputs a writing current during a writing pulse width period. The selecting transistor is coupled to the memory cell. The memory controller is coupled to the selecting transistor and the memory cell. The memory controller is configured to apply a control voltage that gradually changes to a predetermined voltage level to a control end of the selecting transistor during a resistance transition phase of the writing pulse width period and set the control voltage to the predetermined voltage level during a filament stabilization phase after the resistance transition phase, so as to limit the writing current to a predetermined current value. In addition, an operating method for a resistive memory storage apparatus is also provided.”

The patent application was filed on 2021-04-08 (17/226052).