R&D: Spin-Transfer-Torque-MRAM – Status and Outlook

Review use-case and requirements for STT-MRAM to replace SRAM in last-level-cache

This is a Press Release edited by StorageNewsletter.com on January 30, 2023 at 2:00 pm

IEEE Xplore has published, in 2022 IEEE 33rd Magnetic Recording Conference (TMRC) proceedings, an article written by D. C. Worledge, C. Safranski, G. Hu, J. Z. Sun, P. Hashemi, S. L. Brown, L. Buzi, C. P. D’Emic, M. G. Gottwald, O. Gunawan, H. Jung, S. Karimeddiny, J. Kim, and P. L. Trouilloud, IBM-Samsung MRAM Alliance, IBM TJ Watson Research Center, Yorktown Heights, New York, USA.

Abstract: “We review the use-case and requirements for Spin-Transfer-Torque MRAM (STT-MRAM) to replace SRAM in last-level-cache. We then describe recent work on double magnetic tunnel junctions and double spin-torque magnetic tunnel junctions to reduce the MRAM switching current. The latter devices open up the possibility of reducing the switching current by a factor of two while maintaining high magnetoresistance, which could enable the use of STT-MRAM in last-level-cache.“