R&D: Influence of Channel Hole Remaining Ratio on Hemi-Cylindrical Vertical NAND Flash

IEEE Electron Device Letters has published an article written by Jin Ho Chang, Ji Ho Uhm, Department of Electronic Engineering, Sogang University, Mapo-gu, Seoul, Republic of Korea, Hyug Su Kwon, Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Gwanak-gu, Seoul, Republic of Korea, Eunmee Kwon, Flash Device Technology Team, SK Hynix, Icheon-si, Republic of Korea, and Woo Young Choi, Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Gwanak-gu, Seoul, Republic of Korea.

Abstract: “The influence of the channel hole remaining ratio (CHRR) on the hemi-cylindrical (HC) vertical NAND (VNAND) flash memory was investigated using both simulation and experimental data. Although HC VNAND flash memory is advantageous for increasing lateral memory density, it suffers from nonuniform carrier injection and low program/erase efficiency. In this study, the underlying physics of these disadvantages are discussed in terms of the proposed parameter, CHRR. Finally, based on the analysis, a recessed channel HC VNAND flash memory cell is proposed.“