Western Digital Assigned Eighteen Patents

QoS based arbitrations optimized for enterprise SSDs
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,385,835) developed by Benisty, Shay, Beer Sheva, Israel, for a “quality of service based arbitrations optimized for enterprise solid state drives.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method and apparatus for operating a solid state drive is disclosed comprising receiving at least two commands from a host requiring an action by the solid state drive in a preliminary order, ordering the at least two commands based upon a quality of service classification for the at least two commands to a final order and executing the at least two commands on the solid state drive in the final order, wherein an operational parameter of the solid state drive is modified by at least one of the at least two commands.”

The patent application was filed on July 16, 2020 (16/931,309).

TMR sensor with magnetic tunnel junctions with shape anisotropy
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,385,306) developed by Mauri, Daniele, Wang, Lei, San Jose, CA, Zheng, Yuankai, Fremont, CA, Kaiser, Christian, San Jose, CA, Hu, Chih-Ching, Pleasanton, CA, Mao, Ming, Dublin, CA, Jiang, Ming, San Jose, CA, and Van Der Heijden, Petrus Antonius, Cupertino, CA, for a “TMR sensor with magnetic tunnel junctions with shape anisotropy.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Embodiments of the present disclosure generally relate to a sensor of magnetic tunnel junctions (MTJs) with shape anisotropy. In one embodiment, a tunnel magnetoresistive (TMR) based magnetic sensor in a Wheatstone configuration includes at least one magnetic tunnel junctions (MTJ). The MTJ includes a free layer having a first edge and a second edge. The free layer has a thickness of about 100 .ANG. or more. The free layer has a width and a height with a width-to-height aspect ratio of about 4:1 or more. The MTJ has a first hard bias element positioned proximate the first edge of the free layer and a second hard bias element positioned proximate the second edge of the free layer.”

The patent application was filed on December 27, 2019 (16/728,507).

Magnetic recording media design with reduced lattice mismatch between adjacent intermediate layers
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,380,358) developed by Tang Kai, San Jose, CA , for a “magnetic recording media design with reduced lattice mismatch between adjacent intermediate layers.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Magnetic recording media including an interlayer configured to reduce lattice mismatch with adjacent layers of the media, such as an adjacent seed layer or an adjacent underlayer. In one example, an interlayer alloy is provided that includes tungsten (W) along with Cobalt (Co), Chromium (Cr), and Ruthenium (Ru). The atomic percentages of W and Ru within the interlayer are selected so that the amount lattice mismatch between the interlayer and its adjacent layers is below a preselected amount, such as below 3% as quantified by d-spacing. In some examples, the atomic percentage of Ru is greater than 25% and the atomic percentage of W is 2-10%. Methods of fabricating the magnetic recording media are also provided.”

The patent application was filed on June 25, 2020 (16/912,577).

Fast verification of non-volatile data integrity
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,379,305) developed by Zamir, Ran, Ramat Gan, Israel, Avraham, David, Even-Yehuda, Israel, and Sharon, Eran, Rishon Lezion, Israel, for a “fast verification of non-volatile data integrity.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Fast verification of data integrity of non-volatile memory cells is disclosed. In one aspect, an estimate is made of a bit error rate (BER) associated with the data to be verified without fully decoding the data. If the estimated BER is below a threshold, then the storage system reports that the data meets a data integrity criterion. If the estimated BER is above the threshold, the storage system may decode the data to determine a BER and report whether the data meets the data integrity criterion based on the determined BER. The estimate of the BER may be based on a syndrome weight of the data, a BER of an XOR codeword formed from multiple codewords of the data, or a BER of a sample of the data. Hence, considerable time and power are saved verifying data integrity, at least when the data is not fully decoded.”

The patent application was filed on February 9, 2021 (17/171,657).

Host load based dynamic storage for configuration for increased performance
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,379,137) developed by Sharma, Amit, Venugopal, Abhinandan, Bengaluru, India, Agarwal, Dinesh Kumar, Bangalore, India, and Yadav, Akhilesh, Bangalore, India, for a “host load based dynamic storage system for configuration for increased performance.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device including, in one implementation, a non-volatile memory device including a memory block that includes a plurality of memory dies and a controller that is coupled to the non-volatile memory device and that allocates power to non-memory components based on a determined usage of the memory dies. The controller is configured to monitor a utilization of the plurality of memory dies, determine a utilization state of the plurality of memory dies, and calculate an amount of available power allocated to the plurality of memory dies in response to determining that the plurality of memory dies are in a low utilization state. The controller is also configured to determine whether the amount of available power is above a predetermined threshold, and reallocate the available power to one or more components within the data storage device in response to determining that the amount of available power is above the predetermined threshold.”

The patent application was filed on February 16, 2021 (17/176,633).

Application-based storage device configuration settings
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,379,128) developed by Agarwal, Dinesh Kumar, and Sharma, Amit, Bangalore, India, for an “application-based storage device configuration settings.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems, storage devices, and methods for application-based storage device configuration settings are described. A storage device may receive a storage command and dynamically select an application set of configuration settings for processing the storage command, where the configuration settings include trim parameters for writing data units to the storage medium of the storage device.”

The patent application was filed on June 29, 2020 (16/915,397).

Storage and method for using host-assisted variable zone speed grade modes to minimize overprovisioning
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,379,117) developed by Agarwal, Dinesh Kumar, Karnataka, India, for “storage system and method for using host-assisted variable zone speed grade modes to minimize overprovisioning.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage system and method for using host-assisted variable zone speed grade modes to minimize overprovisioning are provided. In one embodiment, a controller of the storage system is configured to receive a request from a host for creation of a zone of memory, in response to the request, create the zone to avoid overprovisioning the zone, determine speed grades of a plurality of usage modes of the zone, inform the host of the speed grades of the plurality of usage modes of the zone, and receive, from the host, a command to write data in the zone pursuant to one of the plurality of usage modes. Other embodiments are provided.”

The patent application was filed on June 19, 2020 (16/906,644).

Power-endurance modes for data center SSDs
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,379,031) developed by Navon, Ariel, Revava, Israel, Sharon, Eran, Rishon Lezion, Israel, and Benisty, Shay, Beer Sheva, Israel, for “power-endurance modes for data center solid-state drives.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An apparatus includes memory arrays and a power-performance-endurance manager module. The power-performance-endurance manager module stores a power-endurance state descriptor data structure, which includes endurance levels associated with power-endurance modes. The manager module dynamically configures the apparatus to operate the memory arrays according to one of the power-endurance modes based on a desired endurance level.”

The patent application was filed on June 30, 2020 (16/917,206).

Storage device using laterally offset read element to compensate for tape stretch
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,373,683) developed by Watson, Mark L., Boulder, CO, Brown, Diane L., San Jose, CA, and Seagle, David J., Morgan Hill, CA, for “data storage device using laterally offset read element to compensate for tape stretch.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device configured to access a magnetic tape is disclosed, wherein the data storage device comprises at least one head configured to access the magnetic tape, wherein the head comprises a write element, a first read element substantially aligned with the write element, and a second read element laterally offset from the first read element. Data is written to a data track and read-after-write verify is performed using the write element and the first read element. In response to a read command received from a host, the data track is read using the second read element to compensate for a stretching of the magnetic tape.”

The patent application was filed on February 19, 2021 (17/179,511).

Storage device reading data from magnetic tape in forward and reverse direction
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,373,682) developed by Malina, James N., Irvine, CA, Hanson, Weldon M., Rochester, MN, and Burton, Derrick E., Ladera Ranch, CA, for a “data storage device reading data from magnetic tape in forward and reverse direction.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device is disclosed comprising at least one head configured to access a magnetic tape. The head is used to write contiguously to the magnetic tape a first preamble, followed by a first sync mark, followed by symbols of a first data sector, followed by a second sync mark, followed by a second preamble, followed by a third sync mark, followed by symbols of a second data sector.”

The patent application was filed on February 17, 2021 (17/177,715).

Storage device using windowed delta-sigma analog-to-digital converter in digital current control loop
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,373,678) developed by Byoun, Jaesoo, Irvine, CA, Kagami, Naoyuki, Fujisawa, Japan, and Ikedo, Gaku, Chigasaki, Japan, for a “data storage device using windowed delta-sigma analog-to-digital converter in digital current control loop.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device is disclosed comprising a voice coil motor (VCM) configured to actuate a head over a disk. The data storage device further comprises control circuitry comprising a digital current control loop including a windowed delta-sigma analog-to-digital converter (ADC) configured to control the VCM. A vibration of the data storage device is measured, and at least one of a gain or a window of the windowed delta-sigma ADC is configured based on the measured vibration.”

The patent application was filed on February 18, 2021 (17/178,307).

Magnetic head with assisted magnetic recording
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,373,675) developed by Bai, Zhigang, Fremont, CA, Zheng, Anna, San Jose, CA, Chembrolu, Venkatesh, Fremont, CA, Narayana, Supradeep, Santa Clara, CA, Wei, Yaguang, Pleasanton, CA, Song, Suping, Fremont, CA, Lam, Terence, Cupertino, CA, Ho, Michael Kuok San, Emerald Hills, CA, Shi, Changqing, San Ramon, CA, Guan, Lijie, and Zhu, Jian-Gang, San Jose, CA, for a “magnetic head with assisted magnetic recording.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A magnetic head includes a main pole configured to serve as a first electrode, an upper pole containing a trailing magnetic shield configured to a serve as a second electrode, and an electrically conductive portion located in a trailing gap between the main pole and the trailing magnetic shield. The electrically conductive portion is not part of a spin torque oscillator stack, and the electrically conductive portion includes at least one electrically conductive, non-magnetic material layer. The main pole and the trailing magnetic shield are electrically shorted by the electrically conductive portion across the trailing gap between the main pole and the trailing magnetic shield such that an electrically conductive path is present between the main pole and the trailing magnetic shield through the electrically conductive portion.”

The patent application was filed on January 4, 2021 (17/141,068).

Mapping for multi-state programming of memory devices
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,372,765) developed by Rub, Bernie, Sudbury, MA, El Gamal, Mostafa, Worcester, MA, Ravindran, Niranjay, Rochester, MN, Barndt, Richard David, San Diego, CA, Chin, Henry, Fremont, CA, Kumar, Ravi J., Redwood City, CA, and Fitzpatrick, James, Laguna Niguel, CA, for “mapping for multi-state programming of memory devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Storage device programming methods, systems and devices are described. A method may generate a mapping of data based on a set of data, the mapping of data including a first mapped data and a second mapped data. The method may include performing a first programming operation to write, in a first mode, the first mapped data to the memory device. The method may include storing the second mapped data to a cache. The method may include generating a second set of data, based on an inverse mapping of the mapping of data including the second mapped data from the cache and the first mapped data from the memory device, for writing, in a second mode, to the memory device, wherein the second set of data includes the set of data, and the first mode and the second mode correspond to different modes of writing to the memory device.”

The patent application was filed on June 18, 2020 (16/905,789).

Storage and method for enabling software-defined dynamic storage response
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,372,754) developed by Muthiah, Ramanathan, Karnataka, India, for “storage system and method for enabling a software-defined dynamic storage response.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage system and method for enabling a software-defined dynamic storage response are provided. In one embodiment, a controller of a storage system is configured to receive an expected response time from a host, in response to receiving the expected response time from the host, cache a logical-to-physical address table entry of a wordline, and store the cached logical-to-physical address table entry of the wordline as metadata in a next wordline along with host data. Other embodiments are provided.”

The patent application was filed on June 12, 2020 (16/899,958).

Storage device and method for enabling compare command with built-in data transformations
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,372,559) developed by Muthiah, Ramanathan, Bangalore, India, for “data storage device and method for enabling a compare command with built-in data transformations.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device and method for enabling a compare command with built-in data transformations. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to: receive, from a host, a compare command, a logical block address, data, and an instruction to perform a data transformation operation, read data from a location in the memory corresponding to the logical block address, execute the data transformation operation on the data read from the location in the memory, and compare a result of the data transformation operation with the data received from the host. Other embodiments are provided.”

The patent application was filed on February 19, 2021 (17/179,930).

Multi-device unlocking of storage device
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,366,933) developed by Mastenbrook, Brian Edward, Fremont, CA, and Klapman, Matthew Harris, San Jose, CA, for a “multi-device unlocking of a data storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Disclosed herein is a data storage device comprising a data path and an access controller. The data path comprises a data port configured to transmit data between a host computer and the data storage device and registers with the host computer system as a block data storage device. A non-volatile storage medium stores encrypted user content data. A cryptography engine is connected between the data port and the storage medium and uses a key to decrypt the encrypted user content data. A data store stores multiple entries comprising authorization data associated with respective authorized devices. The access controller receives from a manager device a public key associated with a private key stored on a device to be authorized, creates the authorization data, and stores the authorization data in association with the public key in the data store, thereby registering the device to be authorized as one of the authorized devices.”

The patent application was filed on December 8, 2019 (16/706,797).

Storage device with burn-after-read mode
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,366,602) developed by Xiong, Shaomin, Fremont, CA, Hirano, Toshiki, San Jose, CA, and Boyle, William B., Lake Forest, CA, for a “data storage device with burn-after-read mode.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device is disclosed comprising a non-volatile storage medium (NVSM) and a head configured to access the NVSM. During a first interval, the head is used to write first data to a first segment of the NVSM, and during a second interval, the head is used to read the first data from the first segment of the NVSM and erase at least part of the first data from the first segment of the NVSM.”

The patent application was filed on June 23, 2020 (16/909,018).

Storage system and method for maintaining uniform hot count distribution using smart stream block exchange
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (11,366,597) developed by Peter, Eldhose, Bengaluru, India, for “storage system and method for maintaining uniform hot count distribution using smart stream block exchange.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage system and method for maintaining uniform hot count distribution using smart stream block exchange are provided. In one embodiment, a rate at which a stream is requesting blocks from a plurality of blocks is determined, and a block from the plurality of blocks is selected for the stream based on the rate at which the stream is requesting blocks. Other embodiments are provided.”

The patent application was filed on January 27, 2020 (16/773,314).