China Flash Assigned Two Patents

Programming charge trap flash memory
China Flash Co., Ltd., Shanghai, China, has been assigned a patent (11,398,279) developed by Nie, Hong, and Chen, Jingwei, Shanghai, China, for a “method for programming charge trap flash memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The present disclosure provides a method for programming charge trap flash memory, including: enabling a channel of a charge trap storage component, to form a transverse electric field between a source and a drain, to generate primary electrons flowing from the source to the drain, colliding, by the primary electrons after a preset time, with the drain to generate electron holes, applying voltages to the drain and a substrate, where the electron holes are accelerated downward by the action of the electric field to collide with the substrate, to generate secondary electrons, and applying voltages to a gate and the substrate, to form a vertical electric field, wherein the secondary electrons generate tertiary electrons under the action of the vertical electric field and the tertiary electrons are injected into an insulating storage medium layer of the charge trap storage component, to complete a programming operation.”

The patent application was filed on October 20, 2021 (17/506,036).

NOR flash memory circuit and data writing
China Flash Co., Ltd., Shanghai, China, has been assigned a patent (11,398,278) developed by Nie, Hong, and Zhao, Yue, Shanghai, China, for “NOR flash memory circuit and data writing method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The present disclosure relates to a NOR flash memory circuit, a data writing method, a data reading method, and a data erasing method. The NOR flash memory circuit includes: a NOR memory array, a source voltage selection unit, a well voltage selection unit, a word line gating unit, a bit line gating unit, a data reading unit, and an analog voltage generating unit. During data writing, a source is floated, and a well electrode is connected to ground, and a first forward voltage is applied to a bit line where a memory cell to be written data into is located, and a second forward voltage is applied to a word line where the memory cell to be written data into is located. During data reading, a source is grounded, and well electrodes are grounded, and a third forward voltage is applied to a word line.”

The patent application was filed on September 11, 2021 (17/472,613).