IEEE Electron Device Letters has published an article written by Choong Hyun Lee, Xiang Ding, Zhangsheng Lan, Jirong Liu, Chu Yan, Zhengyang Chen, Liang Zhao, and Yi Zhao, College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China and International Joint Innovation Center, Zhejiang University, Haining 314400, P.R. China.
Abstract: “In this work, we explore the material potential of yttrium-content GeOx (YGO) in the design of a charge-trapping gate stack for embedded non-volatile memory (eNVM), which can share common gate stack materials with Ge logic CMOS. Based on a deep understanding of YGO, we propose a Ge eNVM with an oxidation-induced self-assembled YGO layer as the charge trapping layer. An eNVM fabricated on Ge offers a fast program/erase (P/E) speed (50 μs and 2 ms for program and erase operations, respectively), low-voltage operation, a data retention lifetime of > 10 years, and an endurance of > 105 P/E cycles.“